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Results: 1-11 |
Results: 11

Authors: KUMAR AN UPADHYAYA SJ
Citation: An. Kumar et Sj. Upadhyaya, COMPONENT-ONTOLOGICAL REPRESENTATION OF FUNCTION FOR REASONING ABOUT DEVICES, Artificial intelligence in engineering, 12(4), 1998, pp. 399-415

Authors: GOLDBERG SR UPADHYAYA SJ
Citation: Sr. Goldberg et Sj. Upadhyaya, IMPLEMENTING DEGRADABLE PROCESSING ARRAYS, IEEE MICRO, 18(1), 1998, pp. 64-74

Authors: NACHMAN L SALUJA KK UPADHYAYA SJ REUSE R
Citation: L. Nachman et al., A NOVEL-APPROACH TO RANDOM PATTERN TESTING OF SEQUENTIAL-CIRCUITS, I.E.E.E. transactions on computers, 47(1), 1998, pp. 129-134

Authors: CHEN YY UPADHYAYA SJ CHENG CH
Citation: Yy. Chen et al., A COMPREHENSIVE RECONFIGURATION SCHEME FOR FAULT-TOLERANT VLSI WSI ARRAY PROCESSORS/, I.E.E.E. transactions on computers, 46(12), 1997, pp. 1363-1371

Authors: KUMAR AN UPADHYAYA SJ
Citation: An. Kumar et Sj. Upadhyaya, FUNCTION-BASED CANDIDATE DISCRIMINATION DURING MODEL-BASED DIAGNOSIS, Applied artificial intelligence, 9(1), 1995, pp. 65-80

Authors: CHEN YY UPADHYAYA SJ
Citation: Yy. Chen et Sj. Upadhyaya, MODELING THE RELIABILITY OF A CLASS OF FAULT-TOLERANT VLSI WSI SYSTEMS BASED ON MULTIPLE-LEVEL REDUNDANCY/, I.E.E.E. transactions on computers, 43(6), 1994, pp. 737-748

Authors: UPADHYAYA SJ RAMAMURTHY B
Citation: Sj. Upadhyaya et B. Ramamurthy, CONCURRENT PROCESS MONITORING WITH NO REFERENCE SIGNATURES, I.E.E.E. transactions on computers, 43(4), 1994, pp. 475-480

Authors: RANGANATHAN A UPADHYAYA SJ
Citation: A. Ranganathan et Sj. Upadhyaya, PERFORMANCE EVALUATION OF ROLLBACK-RECOVERY TECHNIQUES IN COMPUTER-PROGRAMS, IEEE transactions on reliability, 42(2), 1993, pp. 220-226

Authors: CHEN YY UPADHYAYA SJ
Citation: Yy. Chen et Sj. Upadhyaya, YIELD ANALYSIS OF RECONFIGURABLE ARRAY PROCESSORS BASED ON MULTIPLE-LEVEL REDUNDANCY, I.E.E.E. transactions on computers, 42(9), 1993, pp. 1136-1140

Authors: CHEN YY UPADHYAYA SJ
Citation: Yy. Chen et Sj. Upadhyaya, RELIABILITY, RECONFIGURATION, AND SPARE ALLOCATION ISSUES IN BINARY-TREE ARCHITECTURES BASED ON MULTIPLE-LEVEL REDUNDANCY, I.E.E.E. transactions on computers, 42(6), 1993, pp. 713-723

Authors: UPADHYAYA SJ PHAM H
Citation: Sj. Upadhyaya et H. Pham, ANALYSIS OF NONCOHERENT SYSTEMS AND AN ARCHITECTURE FOR THE COMPUTATION OF THE SYSTEM RELIABILITY, I.E.E.E. transactions on computers, 42(4), 1993, pp. 484-493
Risultati: 1-11 |