AAAAAA

   
Results: 1-14 |
Results: 14
FAST FAULT TRANSLATION
Authors: VINNAKOTA B ANDREWS J
Citation: B. Vinnakota et J. Andrews, FAST FAULT TRANSLATION, IEEE transactions on very large scale integration (VLSI) systems, 6(1), 1998, pp. 122-133
ANALOG CIRCUIT OBSERVER BLOCKS
Authors: HARJANI R VINNAKOTA B
Citation: R. Harjani et B. Vinnakota, ANALOG CIRCUIT OBSERVER BLOCKS, IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 44(3), 1997, pp. 154-163
MONITORING POWER DISSIPATION FOR FAULT-DETECTION
Authors: VINNAKOTA B
Citation: B. Vinnakota, MONITORING POWER DISSIPATION FOR FAULT-DETECTION, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 11(2), 1997, pp. 173-181
WORKLOAD DISTRIBUTION IN FAULT SIMULATION
Authors: AMIN MB VINNAKOTA B
Citation: Mb. Amin et B. Vinnakota, WORKLOAD DISTRIBUTION IN FAULT SIMULATION, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 10(3), 1997, pp. 277-282
SYSTEM-LEVEL DESIGN FOR TEST OF FULLY DIFFERENTIAL ANALOG CIRCUITS
Authors: STESSMAN NJ VINNAKOTA B HARJANI R
Citation: Nj. Stessman et al., SYSTEM-LEVEL DESIGN FOR TEST OF FULLY DIFFERENTIAL ANALOG CIRCUITS, IEEE journal of solid-state circuits, 31(10), 1996, pp. 1526-1534
SELF-INITIALIZING MEMORY ELEMENTS
Authors: VINNAKOTA B HARJANI R
Citation: B. Vinnakota et R. Harjani, SELF-INITIALIZING MEMORY ELEMENTS, IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 42(7), 1995, pp. 461-472
IMPLEMENTING MULTIPLICATION WITH SPLIT READ-ONLY MEMORY
Authors: VINNAKOTA B
Citation: B. Vinnakota, IMPLEMENTING MULTIPLICATION WITH SPLIT READ-ONLY MEMORY, I.E.E.E. transactions on computers, 44(11), 1995, pp. 1352-1356
FAST CONVERSION TECHNIQUES FOR BINARY-RESIDUE NUMBER-SYSTEMS
Authors: VINNAKOTA B RAO VVB
Citation: B. Vinnakota et Vvb. Rao, FAST CONVERSION TECHNIQUES FOR BINARY-RESIDUE NUMBER-SYSTEMS, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 41(12), 1994, pp. 927-929
A NEW CIRCUIT FOR MAXIMUM VALUE DETERMINATION
Authors: VINNAKOTA B RAO VVB
Citation: B. Vinnakota et Vvb. Rao, A NEW CIRCUIT FOR MAXIMUM VALUE DETERMINATION, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 41(12), 1994, pp. 929-930
DESIGN OF ALGORITHM-BASED FAULT-TOLERANT MULTIPROCESSOR SYSTEMS FOR CONCURRENT ERROR-DETECTION AND FAULT-DIAGNOSIS
Authors: VINNAKOTA B JHA NK
Citation: B. Vinnakota et Nk. Jha, DESIGN OF ALGORITHM-BASED FAULT-TOLERANT MULTIPROCESSOR SYSTEMS FOR CONCURRENT ERROR-DETECTION AND FAULT-DIAGNOSIS, IEEE transactions on parallel and distributed systems, 5(10), 1994, pp. 1099-1106
GENERATION OF ALL REED-MULLER EXPANSIONS OF A SWITCHING FUNCTION
Authors: VINNAKOTA B RAO VVB
Citation: B. Vinnakota et Vvb. Rao, GENERATION OF ALL REED-MULLER EXPANSIONS OF A SWITCHING FUNCTION, I.E.E.E. transactions on computers, 43(1), 1994, pp. 122-124
SELECTION OF BASES FOR A RESIDUE NUMBER SYSTEM
Authors: VINNAKOTA B
Citation: B. Vinnakota, SELECTION OF BASES FOR A RESIDUE NUMBER SYSTEM, Electronics Letters, 30(11), 1994, pp. 836-837
SYNTHESIS OF ALGORITHM-BASED FAULT-TOLERANT SYSTEMS FOR DEPENDENCE GRAPHS
Authors: VINNAKOTA B JHA NK
Citation: B. Vinnakota et Nk. Jha, SYNTHESIS OF ALGORITHM-BASED FAULT-TOLERANT SYSTEMS FOR DEPENDENCE GRAPHS, IEEE transactions on parallel and distributed systems, 4(8), 1993, pp. 864-874
DIAGNOSABILITY AND DIAGNOSIS OF ALGORITHM-BASED FAULT-TOLERANT SYSTEMS
Authors: VINNAKOTA B JHA NK
Citation: B. Vinnakota et Nk. Jha, DIAGNOSABILITY AND DIAGNOSIS OF ALGORITHM-BASED FAULT-TOLERANT SYSTEMS, I.E.E.E. transactions on computers, 42(8), 1993, pp. 924-937
Risultati: 1-14 |