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Authors: BROWN S KHELLAH M VRANESIC Z
Citation: S. Brown et al., MINIMIZING FPGA INTERCONNECT DELAYS, IEEE design & test of computers, 13(4), 1996, pp. 16-23

Authors: FARKAS K VRANESIC Z STUMM M
Citation: K. Farkas et al., SCALABLE CACHE CONSISTENCY FOR HIERARCHICALLY STRUCTURED MULTIPROCESSORS, Journal of supercomputing, 8(4), 1995, pp. 345-369

Authors: VANDEPANNE M FIUME E VRANESIC Z
Citation: M. Vandepanne et al., PHYSICALLY-BASED MODELING AND CONTROL OF TURNING, CVGIP. Graphical models and image processing, 55(6), 1993, pp. 507-521
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