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Results: 1-2 |
Results: 2
LOW-COST AND LOW-POWER SILICON NPN BIPOLAR PROCESS WITH NMOS TRANSISTORS (ADRF) FOR RF AND MICROWAVE APPLICATIONS
Authors: O K GARONE P TSAI C DAWE G SCHARF B TEWKSBURY T KERMARREC C YASAITIS J
Citation: K. O et al., LOW-COST AND LOW-POWER SILICON NPN BIPOLAR PROCESS WITH NMOS TRANSISTORS (ADRF) FOR RF AND MICROWAVE APPLICATIONS, I.E.E.E. transactions on electron devices, 42(10), 1995, pp. 1831-1840
INTEGRATION OF 2 DIFFERENT GATE OXIDE THICKNESSES IN A 0.6-MU-M DUAL VOLTAGE MIXED-SIGNAL CMOS PROCESS
Authors: O KK YASAITIS J
Citation: Kk. O et J. Yasaitis, INTEGRATION OF 2 DIFFERENT GATE OXIDE THICKNESSES IN A 0.6-MU-M DUAL VOLTAGE MIXED-SIGNAL CMOS PROCESS, I.E.E.E. transactions on electron devices, 42(1), 1995, pp. 190-192
Risultati: 1-2 |