MINIMUM INVENTORY VARIABILITY SCHEDULE WITH APPLICATIONS IN SEMICONDUCTOR FABRICATION

A typical semiconductor wafer fab contains many different products and processes, some with small quantities, competing for resources. Each product flow can contain hundreds of processing steps demanding produc tion time of the same resource many times during the flow. When this r e-entry requirement is compounded with multiple product flows, short i nterval scheduling becomes important. Scheduling to reduce variations and to balance the whole wafer production line becomes a very complex issue. We investigate in this paper a new scheduling policy called min imum inventory variability scheduling (MIVS). This scheduling policy c an significantly reduce the mean and variance of cycle-time in semicon ductor fabs. The conclusions are based on the real world implementatio n in two major semiconductor fabs since 1990, and a simulation study o f a much simplified hypothetical re-entrant network to capture the nat ure of semiconductor manufacturing. A discrete event simulation model was used to compare MIVS with five different popular dispatching polic ies (FIFO, SNQ, LNQ, RAN, and CYC) practiced in wafer fabrication envi ronments. The results gained on two factory floors and the simulation model indicate that dispatching policies have a significant impact on performance. The simulation results show that the MIVS dispatching pol icy demonstrated a percentage improvement over all other tested dispat ching policies.