A VERSATILE STRUCTURE FOR ON-CHIP EXTRACTION OF RESISTANCE MATCHING PROPERTIES

This paper describes a simple test structure to accurately characteriz e resistance mismatch. The process engineer would use this structure t o monitor process variations with respect to contact resistance, sprea ding resistance, sheet resistance and encroachment, The circuit design er would use the structure to determine the matching properties of the Line and how to optimize a resistor layout for matching given a maxim um physical size. By direct measurements on the structure, the user wi ll know how well resistors can be matched, and what factors introduce the dominant components of the mismatch.