MODELING THE EFFECT OF HOT LOTS IN SEMICONDUCTOR MANUFACTURING SYSTEMS

The presence of hot lots or high-priority jobs in semiconductor manufa cturing systems is known to significantly affect the cycle time and th roughput of the regular lots since the hot lots get priority at all st ages of processing. In this paper, we present an efficient analytical model based on re-entrant lines and use an efficient, approximate anal ysis methodology for this model in order to predict the performance of a semiconductor manufacturing line in the presence of hot lots, The p roposed method explicitly models scheduling policies and can be used f or rapid performance analysis, Using the analytical method and also si mulation, we analyze two re-entrant lines, including a full-scale mode l of a wafer fab, under various buffer priority scheduling policies, T he numerical results show the severe effects hot lots can have on the performance characteristics of regular lots.