A POWER MOSFET DESIGN METHODOLOGY CONSIDERING EPI PARAMETER VARIATIONS

An optimum design method of power MOSFET's that maximizes the number o f good die is presented. From the device specification of the maximum voltage and current given, the target design value of the breakdown vo ltage required for the maximum number of good die is determined by con sidering the variations of parameters such as thickness and resistivit y of the epitaxial layer, chip area and defect density during manufact uring process. In the case of a 650 V/5 A power MOSFET, the optimum de sign target of the breakdown voltage is found to be 710 V, which gives 1213 good dice from a 5-in wafer with the defect density of 5/cm2 whe n ideal junction termination is assumed. This maximum number of good d ie is reduced to 855 in practice due to the nonideal junction terminat ion with 80% of the ideal breakdown voltage, resulting in the target d esign voltage of 890 V.