Ja. Power et al., RELATING STATISTICAL OSFET MODEL PARAMETER VARIABILITIES TO IC MANUFACTURING PROCESS FLUCTUATIONS ENABLING REALISTIC WORST-CASE DESIGN, IEEE transactions on semiconductor manufacturing, 7(3), 1994, pp. 306-318
The implementation of a viable statistical circuit design methodology
requiring detailed knowledge of the variabilities of, and correlations
among, the circuit simulator model parameters utilized by designers,
and the determination of the important relationships between these CAD
model parameter variabilities and the process variabilities causing t
hem is presented. This work addresses the above requirements by detail
ing a new framework which was adopted for a 2-mum CMOS technology to e
nable realistic statistical circuit performance prediction prior to ma
nufacture. Issues relating to MOSFET modeling, the derivation of fast
''direct'' parameter extraction methodologies suitable for rapid param
eter generation, the employment of multivariate statistical techniques
to analyze statistical parametric data, and the linking of the CAD mo
del parameter variations to variabilities in process quantities are di
scussed. In this approach the correlated set of model parameters is re
duced to a smaller and more manageable set of uncorrelated process-rel
ated factors. The ensuing construction and validation of realistic sta
tistical circuit performance procedures is also discussed. Comparisons
between measured and simulated variabilities of device characteristic
s is utilized to demonstrate the accuracy of the techniques described.
The advantages of the proposed approach over more traditional ''worst
case'' design methodologies are demonstrated.