This paper describes the exploratory use of electrical test structures
to enable the calibration of optical overlay instruments of the type
used to monitor semiconductor-device fabrication processes, Such optic
al instruments are known to be vulnerable to hard-to-determine systema
tic process- and instrument-specific errors known as shifts.(1) Howeve
r, these shift errors generally do not affect electrical test-structur
e measurements extracted from the same features.(2) Thus the opportuni
ty exists to configure physical standards having overlay that can be c
ertified by electrical means, thereby enabling estimates of the shifts
prevailing in a particular application, In this work, a new hybrid te
st structure, meaning one from which overlay measurements can be extra
cted electrically, as well as by optical instruments, has been designe
d and fabricated with built-in overlay values ranging from -60 to +60
nm, A selection of structures constituting a test chip has been patter
ned in a single conducting film with CD (critical dimension) design ru
les ranging from 1.0 mu m to 2.0 mu m and fabricated and tested, Elect
rical overlay parameters, derived from multiple step-and-repeat die-si
te measurements, generally match the corresponding optical measurement
s to within several nanometers, subject to limitations of the pattern-
replication process, This paper focuses on the extraction of overlay f
rom the electrical measurements, the dependence of the measurements on
CD design rules, and their comparison with the corresponding measurem
ents made both by a commercial optical-overlay instrument and by a coo
rdinate-measurement system having measurements traceable to absolute d
imensional standards, It is presented as a first step toward the use o
f electrical measurements for advancing shift management in optical ov
erlay of features patterned in separate lithographic processes.