This paper describes a prototype of a discrete event simulator-Y4 (yie
ld Forecaster)-capable of simulating defect related yield loss and man
ufacturing cost as a function of time, for a multiproduct IC manufactu
ring line, The methodology of estimating yield and cost is based on mi
micking the operation and characteristics of a manufacturing line in t
he time domain, The paper presents a set of models that take into acco
unt the effect of particles introduced during wafer processing as well
as changes in their densities due to process improvements, These mode
ls also illustrate a possible way of accounting for the primary attrib
utes of fabrication, product, and failure analysis which affect yield
learning, A spectrum of results are presented for a manufacturing scen
ario to demonstrate the usefulness of the simulator in formulating IC
manufacturing strategies.