SCHEDULING OF MASK SHOP E-BEAM WRITERS

Reducing wafer fabrication cycle time and providing on-time wafer deli veries are among the top priorities of semiconductor companies, Mask m anufacturing is essential to the overall wafer fabrication process sin ce on-time delivery of masks significantly affects wafer fabrication c ycle times, Moreover, delivering wafers on time means deliveries of ma sks must be on time as well. This research studies the scheduling prob lem of the bottleneck machine-the Electrical Beam (E-beam) Writer-of a mask shop. The criterion of minimum total tardiness is used as our pe rformance measure to schedule this bottleneck operation. Using a prede termined Earliest-Due-Date (EDD) dispatch policy set by management, th is study first addresses the problem of scheduling batches of a single mask size on a single machine, The approach is extended to the proble m of scheduling batches of two mask sizes on a single machine; finally , a heuristic for a multiple-machine problem is developed, For the pro blem of a single machine under EDD dispatching policy, the problem can be formulated as a Dynamic Program (DP), Thus, it can be solved for a n optimal solution in polynomial time. For the multiple machines probl em, we heuristically allocate the masks to each machine, Each machine with allocated masks can then be solved by the DP formulation designed for the single machine problem. Based on the computational experiment s in this study, the proposed DP approach reduces total tardiness by a n average of 55% from the method currently in use at a major IC manufa cturing foundry, Furthermore, in the case that due dates are set reali stically, the DP approach reduces the tardiness about 95% from the sho p's current method and about 88% from a simple full-batch method of sc heduling.