B. Vermeire et al., THE EFFECT OF COPPER CONTAMINATION ON FIELD OVERLAP EDGES AND PERIMETER JUNCTION LEAKAGE CURRENT, IEEE transactions on semiconductor manufacturing, 11(2), 1998, pp. 232-238
This work demonstrates that copper contamination present on pre gate-o
xidation silicon surfaces results in yield and reliability problems pa
rticularly at field overlap edges. Similarly, the junction leakage cur
rent associated with the junction perimeter dominates the total leakag
e current. These detrimental device effects are shown to be caused by
copper that is present close to the silicon surface even after thermal
processing. Because field overlap and junction perimeter defects beco
me relatively more important when the critical dimensions of circuits
are scaled to smaller sizes, they dominate yield loss of high-density
circuits, magnifying their importance for future technology generation
s.