MODELING AND EMULATION OF A FURNACE IN IC FAB BASED ON COLORED-TIMED PETRI-NET

In integrated circuit (IC) manufacturing, the wafer processing takes m ore time in furnaces than other equipment. How to effectively integrat e furnaces with other automated machines is very important. In particu lar, using the real furnace for testing not only introduces trouble bu t also wastes time. This paper aims to model and construct an emulatio n environment for the furnace. The colored timed Petri net (CTPN) is u sed to model the furnace. Based on CTPN, the dynamic behaviors of the furnace, such as loading, processing, unloading and wafer count mismat ching, can be emulated. The proposed CTPN model is hierarchical and mo dular. The hierarchical architecture is built by dividing the behavior s of the furnace to make the model more compact and the modular modeli ng makes the model flexible and easy to use. On the other hand, the fu rnace emulator provides a quasi environment for testing so that potent ial problems of the system can be detected in advance and the testing time can be economized.