CONVENTIONAL CONTACT INTERCONNECT TECHNOLOGY AS AN ALTERNATIVE TO CONTACT PLUG (W) TECHNOLOGY FOR 0.85 MU-M CMOS EPROM IC DEVICES

Citation
Mm. Farahani et al., CONVENTIONAL CONTACT INTERCONNECT TECHNOLOGY AS AN ALTERNATIVE TO CONTACT PLUG (W) TECHNOLOGY FOR 0.85 MU-M CMOS EPROM IC DEVICES, IEEE transactions on semiconductor manufacturing, 7(1), 1994, pp. 79-86
Citations number
10
Categorie Soggetti
Engineering, Eletrical & Electronic","Engineering, Manufacturing","Physics, Applied
ISSN journal
08946507
Volume
7
Issue
1
Year of publication
1994
Pages
79 - 86
Database
ISI
SICI code
0894-6507(1994)7:1<79:CCITAA>2.0.ZU;2-N
Abstract
The conventional (plug-less) and tungsten (W) plug contact interconnec t technologies were studied for the fabrication of 0.85 mum CMOS EPROM integrated circuit devices. 4 Mbit EPROM devices and appropriate test structures were fabricated using these two interconnect architectures and were evaluated for process simplicity, associated problems/soluti ons, contact electrical characteristics, and circuit yield and speed. A TiN/Ti bi-layer film was used as a diffusion barrier (conventional p rocess) and glue layer (W plug process). A strong adhesion bond betwee n the TiN/Ti and the underlying BPTEOS films was required for the W pl ug process in order to withstand the tensile stress of the W film (3-4 E9 dynes/cm2). In the absence of a strong adhesion bond, the TiN/Ti fi lm would separate (peel off) from the oxide film during, or after depo sition of the W film. In order to eliminate peeling, the wafers with T iN/Ti were subjected to a multi-step rapid thermal heat treatment proc ess (RTHT) prior to W deposition. This process resulted in the formula tion of a TiSi(x) compound, and consequently, a strong bond between th e TiN/Ti and the BFTEOS films. The most important process issue for th e conventional contact technology was the overlay accuracy of the step per used for printing the contacts. It was found that a misalignment o f < 0.3 mum was essential if contact's were to be reflowed after the c ontact etch process in a way that: a) did not violate the geometrical design rules, and b) did not result in bulging of the contacts, or an increase in the contact profile angle which would degrade metal step c overage. Electrical characteristics of the contacts were studied throu gh contact resistance, specific contact resistivity, contact failure r ate, and junction leakage measurements for both contact interconnect a rchitectures. The data presented indicated that both processes produce d contacts with similar characteristics. Finally, the results of this work indicated that the conventional contact interconnect technology c ould be reliably used for fabrication of 0.85 mum CMOS EPROM devices. This process was simpler, less expensive, and as structurally reliable as the W contact plug technology.