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Table of contents of journal: *Microprocessors and microsystems

Results: 51-75/349
LOW-POWER MEMORY HIERARCHIES - AN ARGUMENT FOR 2ND-LEVEL CACHES
Authors: FLANAGAN JK ARCHIBALD JK SU J
Citation: Jk. Flanagan et al., LOW-POWER MEMORY HIERARCHIES - AN ARGUMENT FOR 2ND-LEVEL CACHES, Microprocessors and microsystems, 21(5), 1998, pp. 279-290
RING-CONNECTED TREES - A MULTIPURPOSE VLSI ARCHITECTURE FOR PARALLEL-PROCESSING
Authors: BASU SK DATTAGUPTA J DATTAGUPTA R
Citation: Sk. Basu et al., RING-CONNECTED TREES - A MULTIPURPOSE VLSI ARCHITECTURE FOR PARALLEL-PROCESSING, Microprocessors and microsystems, 21(5), 1998, pp. 291-298
DYNAMIC TASK-SCHEDULING IN DISTRIBUTED REAL-TIME SYSTEMS USING FUZZY RULES
Authors: LITOIU M IONESCU TC LABARTA J
Citation: M. Litoiu et al., DYNAMIC TASK-SCHEDULING IN DISTRIBUTED REAL-TIME SYSTEMS USING FUZZY RULES, Microprocessors and microsystems, 21(5), 1998, pp. 299-311
ON TIMING CONSTRAINTS OF SNOOPING IN A BUS-BASED COMA MULTIPROCESSOR
Authors: CHO SY KONG JK LEE GH
Citation: Sy. Cho et al., ON TIMING CONSTRAINTS OF SNOOPING IN A BUS-BASED COMA MULTIPROCESSOR, Microprocessors and microsystems, 21(5), 1998, pp. 313-318
A STUDY OF BUS EMULATION - APPLICATION TO M68000 BASED SYSTEMS
Authors: RODRIGUEZ JM CIVITBALCELLS A JIMENEZ G SEVILLANO JL DIAZ F
Citation: Jm. Rodriguez et al., A STUDY OF BUS EMULATION - APPLICATION TO M68000 BASED SYSTEMS, Microprocessors and microsystems, 21(5), 1998, pp. 319-327
DESIGN OF A VMEBUS-BASED PROGRAMMABLE LOGIC-CONTROLLER (PLC)
Authors: ALKHUDAIRY TF ALHASHEMY BAR ALBAKER MAJ
Citation: Tf. Alkhudairy et al., DESIGN OF A VMEBUS-BASED PROGRAMMABLE LOGIC-CONTROLLER (PLC), Microprocessors and microsystems, 21(5), 1998, pp. 329-336
INTERFACING BETWEEN LVDS AND ECL
Authors: DIERMEIER A
Citation: A. Diermeier, INTERFACING BETWEEN LVDS AND ECL, Microprocessors and microsystems, 21(5), 1998, pp. 337-342
ACHIEVING QUALITY, SAFETY, SECURITY AND RELIABILITY IN SOFTWARE SYSTEMS
Authors: GRITZALIS DA
Citation: Da. Gritzalis, ACHIEVING QUALITY, SAFETY, SECURITY AND RELIABILITY IN SOFTWARE SYSTEMS, Microprocessors and microsystems, 21(10), 1998, pp. 585-586
DEVELOPING AND CHECKING PRESCRIPTIVE SPECIFICATIONS FOR SAFETY IMPROVEMENT
Authors: YIH S TIAN J
Citation: S. Yih et J. Tian, DEVELOPING AND CHECKING PRESCRIPTIVE SPECIFICATIONS FOR SAFETY IMPROVEMENT, Microprocessors and microsystems, 21(10), 1998, pp. 587-594
SPECIFICATION COMPOSITION FOR THE VERIFICATION OF MESSAGE-PASSING PROGRAM COMPOSITION
Authors: COTRONIS JY TSIATSOULIS Z
Citation: Jy. Cotronis et Z. Tsiatsoulis, SPECIFICATION COMPOSITION FOR THE VERIFICATION OF MESSAGE-PASSING PROGRAM COMPOSITION, Microprocessors and microsystems, 21(10), 1998, pp. 595-603
MOTIVATED HUMANS FOR RELIABLE SOFTWARE PRODUCTS
Authors: FRANGOS SA
Citation: Sa. Frangos, MOTIVATED HUMANS FOR RELIABLE SOFTWARE PRODUCTS, Microprocessors and microsystems, 21(10), 1998, pp. 605-610
MODIFICATION OF SAFETY-CRITICAL SYSTEMS - AN ASSESSMENT OF 3 APPROACHES
Authors: STALHANE T WEDDE KJ
Citation: T. Stalhane et Kj. Wedde, MODIFICATION OF SAFETY-CRITICAL SYSTEMS - AN ASSESSMENT OF 3 APPROACHES, Microprocessors and microsystems, 21(10), 1998, pp. 611-619
THE CASCADE VULNERABILITY PROBLEM - THE DETECTION PROBLEM AND A SIMULATED ANNEALING APPROACH FOR ITS CORRECTION
Authors: GRITZALIS S SPINELLIS D
Citation: S. Gritzalis et D. Spinellis, THE CASCADE VULNERABILITY PROBLEM - THE DETECTION PROBLEM AND A SIMULATED ANNEALING APPROACH FOR ITS CORRECTION, Microprocessors and microsystems, 21(10), 1998, pp. 621-627
A TELEPHONE ADAPTER FOR INTERNET TELEPHONY SYSTEMS
Authors: FOO S YEO CK HUI SC
Citation: S. Foo et al., A TELEPHONE ADAPTER FOR INTERNET TELEPHONY SYSTEMS, Microprocessors and microsystems, 21(4), 1997, pp. 213-221
ACCELERATING FINITE-DIFFERENCE ANALYSIS SIMULATIONS WITH A CONFIGURABLE COMPUTING MACHINE
Authors: PAAR KJ ATHANAS PM
Citation: Kj. Paar et Pm. Athanas, ACCELERATING FINITE-DIFFERENCE ANALYSIS SIMULATIONS WITH A CONFIGURABLE COMPUTING MACHINE, Microprocessors and microsystems, 21(4), 1997, pp. 223-235
PERFORMANCE EVALUATION OF DSP AND TRANSPUTER-BASED SYSTEMS IN SEQUENTIAL REAL-TIME APPLICATIONS
Authors: TOKHI MO HOSSIAN MA CHAMBERS C
Citation: Mo. Tokhi et al., PERFORMANCE EVALUATION OF DSP AND TRANSPUTER-BASED SYSTEMS IN SEQUENTIAL REAL-TIME APPLICATIONS, Microprocessors and microsystems, 21(4), 1997, pp. 237-248
PROTOS - A MICROCONTROLLER FPGA-BASED PROTOTYPING SYSTEM FOR EMBEDDEDAPPLICATIONS/
Authors: SALCIC Z
Citation: Z. Salcic, PROTOS - A MICROCONTROLLER FPGA-BASED PROTOTYPING SYSTEM FOR EMBEDDEDAPPLICATIONS/, Microprocessors and microsystems, 21(4), 1997, pp. 249-256
HIGH-PERFORMANCE FPGA-BASED IMPLEMENTATION OF KALMAN FILTER
Authors: LEE CR SALCIC Z
Citation: Cr. Lee et Z. Salcic, HIGH-PERFORMANCE FPGA-BASED IMPLEMENTATION OF KALMAN FILTER, Microprocessors and microsystems, 21(4), 1997, pp. 257-265
ACHIEVING FAULT-TOLERANCE AND HIGH-RELIABILITY
Authors: SOMANI AK
Citation: Ak. Somani, ACHIEVING FAULT-TOLERANCE AND HIGH-RELIABILITY, Microprocessors and microsystems, 21(3), 1997, pp. 147-150
ALGORITHM-BASED FAULT-TOLERANCE - A REVIEW
Authors: VIJAY M MITTAL R
Citation: M. Vijay et R. Mittal, ALGORITHM-BASED FAULT-TOLERANCE - A REVIEW, Microprocessors and microsystems, 21(3), 1997, pp. 151-161
A NEW SCHEDULING APPROACH SUPPORTING DIFFERENT FAULT-TOLERANT TECHNIQUES FOR REAL-TIME MULTIPROCESSOR SYSTEMS
Authors: MANIMARAN G MURTHY CSR
Citation: G. Manimaran et Csr. Murthy, A NEW SCHEDULING APPROACH SUPPORTING DIFFERENT FAULT-TOLERANT TECHNIQUES FOR REAL-TIME MULTIPROCESSOR SYSTEMS, Microprocessors and microsystems, 21(3), 1997, pp. 163-173
SINGLE-SOURCE FAULT-TOLERANT BROADCASTING FOR 2-DIMENSIONAL MESHES WITHOUT VIRTUAL CHANNELS
Authors: AVRESKY DR CUNNINGHAM CM
Citation: Dr. Avresky et Cm. Cunningham, SINGLE-SOURCE FAULT-TOLERANT BROADCASTING FOR 2-DIMENSIONAL MESHES WITHOUT VIRTUAL CHANNELS, Microprocessors and microsystems, 21(3), 1997, pp. 175-182
SINGLE FAULT-TOLERANT DISTRIBUTED SHARED-MEMORY USING COMPETITIVE UPDATE
Authors: KIM JH VAIDYA NH
Citation: Jh. Kim et Nh. Vaidya, SINGLE FAULT-TOLERANT DISTRIBUTED SHARED-MEMORY USING COMPETITIVE UPDATE, Microprocessors and microsystems, 21(3), 1997, pp. 183-196
ONLINE ERROR-DETECTION THROUGH DATA DUPLICATION IN DISTRIBUTED-MEMORYSYSTEMS
Authors: GONG C MELHEM R GUPTA R
Citation: C. Gong et al., ONLINE ERROR-DETECTION THROUGH DATA DUPLICATION IN DISTRIBUTED-MEMORYSYSTEMS, Microprocessors and microsystems, 21(3), 1997, pp. 197-209
VLSI IMPLEMENTATION OF DETECTION OF R2 SIGNALIZATION
Authors: DAVIDOVIC G CIRIC J MILUTINOVIC V HADZIC G RADICEVIC L
Citation: G. Davidovic et al., VLSI IMPLEMENTATION OF DETECTION OF R2 SIGNALIZATION, Microprocessors and microsystems, 21(2), 1997, pp. 73-78
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