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Results: 1-7 |
Results: 7
APPLICATION OF BYTE ERROR DETECTING CODES TO THE DESIGN OF SELF-CHECKING CIRCUITS
Authors: PAGEY S ALKHALILI AJ
Citation: S. Pagey et Aj. Alkhalili, APPLICATION OF BYTE ERROR DETECTING CODES TO THE DESIGN OF SELF-CHECKING CIRCUITS, Microelectronics, 29(6), 1998, pp. 323-333
UNIVERSAL TSC MODULE AND ITS APPLICATION TO THE DESIGN OF TSC CIRCUITS
Authors: PAGEY S ALKHALILI AJ
Citation: S. Pagey et Aj. Alkhalili, UNIVERSAL TSC MODULE AND ITS APPLICATION TO THE DESIGN OF TSC CIRCUITS, Microelectronics, 28(1), 1997, pp. 29-39
A 2-DIMENSIONAL MICROMACHINED ACCELEROMETER
Authors: AHMAD H ALKHALILI AJ LANDSBERGER LM KAHRIZI M
Citation: H. Ahmad et al., A 2-DIMENSIONAL MICROMACHINED ACCELEROMETER, IEEE transactions on instrumentation and measurement, 46(1), 1997, pp. 18-26
DESIGN TECHNIQUES FOR FAULT-TOLERANT SYSTOLIC ARRAYS
Authors: ESONU MO ALKHALILI AJ HARIRI S ALKHALILI D
Citation: Mo. Esonu et al., DESIGN TECHNIQUES FOR FAULT-TOLERANT SYSTOLIC ARRAYS, Journal of VLSI signal processing, 11(1-2), 1995, pp. 151-168
AREA-EFFICIENT COMPUTING STRUCTURES FOR CONCURRENT ERROR-DETECTION INSYSTOLIC ARRAYS
Authors: ESONU MO ALKHALILI AJ HARIRI S
Citation: Mo. Esonu et al., AREA-EFFICIENT COMPUTING STRUCTURES FOR CONCURRENT ERROR-DETECTION INSYSTOLIC ARRAYS, Journal of VLSI signal processing, 10(3), 1995, pp. 237-260
FAULT-TOLERANT DESIGN METHODOLOGY FOR SYSTOLIC ARRAY ARCHITECTURES
Authors: ESONU MO ALKHALILI AJ HARIRI S ALKHALILI D
Citation: Mo. Esonu et al., FAULT-TOLERANT DESIGN METHODOLOGY FOR SYSTOLIC ARRAY ARCHITECTURES, IEE proceedings. Computers and digital techniques, 141(1), 1994, pp. 17-28
ROBUST ADAPTIVE CONTROLLER-DESIGN FOR FLEXIBLE JOINT MANIPULATORS
Authors: ALASHOOR RA KHORASANI K PATEL RV ALKHALILI AJ
Citation: Ra. Alashoor et al., ROBUST ADAPTIVE CONTROLLER-DESIGN FOR FLEXIBLE JOINT MANIPULATORS, Robotics and computer-integrated manufacturing, 9(2), 1992, pp. 101-112
Risultati: 1-7 |