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Results: 1-6 |
Results: 6

Authors: Bedsole, J Raina, R Crouch, A Abadir, MS
Citation: J. Bedsole et al., Very low cost testers: Opportunities and challenges, IEEE DES T, 18(5), 2001, pp. 60-69

Authors: Krishnamurthy, N Abadir, MS Martin, AK Abraham, JA
Citation: N. Krishnamurthy et al., Design and development paradigm for industrial formal verification CAD tools, IEEE DES T, 18(4), 2001, pp. 26-35

Authors: Wang, LC Abadir, MS
Citation: Lc. Wang et Ms. Abadir, On efficiently producing quality tests for custom circuits in PowerPC (TM)microprocessors, J ELEC TEST, 16(1-2), 2000, pp. 121-130

Authors: Wu, WC Lee, CL Wu, MS Chen, JE Abadir, MS
Citation: Wc. Wu et al., Oscillation ring delay test for high performance microprocessors, J ELEC TEST, 16(1-2), 2000, pp. 147-155

Authors: Wang, LC Abadir, MS
Citation: Lc. Wang et Ms. Abadir, Experience in validation of PowerPC (TM) microprocessor embedded arrays, J ELEC TEST, 15(1-2), 1999, pp. 191-205

Authors: Wang, LC Abadir, MS
Citation: Lc. Wang et Ms. Abadir, Test generation based on high-level assertion specification for PowerPC (TM) microprocessor embedded arrays, J ELEC TEST, 13(2), 1998, pp. 121-135
Risultati: 1-6 |