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Results:
1-7
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Results: 7
1.2-Gb/s true PECL 100K compatible I/O interface in 0.35-mu m CMOS
Authors:
Boni, A
Citation:
A. Boni, 1.2-Gb/s true PECL 100K compatible I/O interface in 0.35-mu m CMOS, IEEE J SOLI, 36(6), 2001, pp. 979-987
LVDS I/O interface for Gb/s-per-pin operation in 0.35-mu m CMOS
Authors:
Boni, A Pierazzi, A Vecchi, D
Citation:
A. Boni et al., LVDS I/O interface for Gb/s-per-pin operation in 0.35-mu m CMOS, IEEE J SOLI, 36(4), 2001, pp. 706-711
A 10-b 185-MS/s track-and-hold in 0.35-mu m CMOS
Authors:
Boni, A Pierazzi, A Morandi, C
Citation:
A. Boni et al., A 10-b 185-MS/s track-and-hold in 0.35-mu m CMOS, IEEE J SOLI, 36(2), 2001, pp. 195-203
A case study of a distributed high-performance computing system for neurocomputing
Authors:
Anguita, D Boni, A Parodi, G
Citation:
D. Anguita et al., A case study of a distributed high-performance computing system for neurocomputing, J SYST ARCH, 46(5), 2000, pp. 429-438
Dynamic characterisation of high-speed latching comparators
Authors:
Boni, A Chiorboli, G Morandi, C
Citation:
A. Boni et al., Dynamic characterisation of high-speed latching comparators, ELECTR LETT, 36(5), 2000, pp. 402-404
A 2.5-V BiCMOS comparator with current-mode interpolation
Authors:
Boni, A Morandi, C Padoan, S
Citation:
A. Boni et al., A 2.5-V BiCMOS comparator with current-mode interpolation, IEEE J SOLI, 34(6), 1999, pp. 892-897
Learning algorithm for nonlinear support vector machines suited for digital VLSI
Authors:
Anguita, D Boni, A Ridella, S
Citation:
D. Anguita et al., Learning algorithm for nonlinear support vector machines suited for digital VLSI, ELECTR LETT, 35(16), 1999, pp. 1349-1350
Risultati:
1-7
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