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Results: 1-10 |
Results: 10
A computational model for oxide breakdown: theory and experiments
Authors: Alam, A Weir, B Bude, J Silverman, P Ghetti, A
Citation: A. Alam et al., A computational model for oxide breakdown: theory and experiments, MICROEL ENG, 59(1-4), 2001, pp. 137-147
Insight into the relationship between hot electron degradation and substrate current in sub-0.1 mu m technologies
Authors: Ghetti, A Bude, J Liu, CT
Citation: A. Ghetti et al., Insight into the relationship between hot electron degradation and substrate current in sub-0.1 mu m technologies, SOL ST ELEC, 45(9), 2001, pp. 1591-1595
Anode hole generation mechanisms
Authors: Ghetti, A Alam, M Bude, J
Citation: A. Ghetti et al., Anode hole generation mechanisms, MICROEL REL, 41(9-10), 2001, pp. 1347-1354
T-BD prediction from low-voltage near-interface trap-assisted tunneling current measurements
Authors: Ghetti, A Bude, J Weber, G
Citation: A. Ghetti et al., T-BD prediction from low-voltage near-interface trap-assisted tunneling current measurements, IEEE DEVICE, 48(7), 2001, pp. 1354-1359
Modeling and simulation of tunneling current in MOS devices including quantum mechanical effects
Authors: Ghetti, A Bude, J Silverman, P Hamad, A Vaidya, H
Citation: A. Ghetti et al., Modeling and simulation of tunneling current in MOS devices including quantum mechanical effects, IEICE TR EL, E83C(8), 2000, pp. 1175-1182
Probing the limits of optical lithography: The fabrication of sub-100nm devices with 193nm wavelength lithography
Authors: Cirelli, RA Bude, J Houlihan, F Gabor, A Watson, GP Weber, GR Klemens, FP Sweeney, J Mansfield, WM Nalamasu, O
Citation: Ra. Cirelli et al., Probing the limits of optical lithography: The fabrication of sub-100nm devices with 193nm wavelength lithography, MICROEL ENG, 53(1-4), 2000, pp. 87-90
The relentless march of the MOSFET gate oxide thickness to zero
Authors: Timp, G Bude, J Baumann, F Bourdelle, KK Boone, T Garno, J Ghetti, A Green, M Gossmann, H Kim, Y Kleiman, R Kornblit, A Klemens, F Moccio, S Muller, D Rosamilia, J Silverman, P Sorsch, T Timp, W Tennant, D Tung, R Weir, B
Citation: G. Timp et al., The relentless march of the MOSFET gate oxide thickness to zero, MICROEL REL, 40(4-5), 2000, pp. 557-562
Stress induced leakage current analysis via quantum yield experiments
Authors: Ghetti, A Alam, M Bude, J Monroe, D Sangiorgi, E Vaidya, H
Citation: A. Ghetti et al., Stress induced leakage current analysis via quantum yield experiments, IEEE DEVICE, 47(7), 2000, pp. 1341-1348
Tunneling into interface states as reliability monitor for ultrathin oxides
Authors: Ghetti, A Sangiorgi, E Bude, J Sorsch, TW Weber, G
Citation: A. Ghetti et al., Tunneling into interface states as reliability monitor for ultrathin oxides, IEEE DEVICE, 47(12), 2000, pp. 2358-2365
Effect of implant damage on the gate oxide thickness
Authors: Vuong, HH Bude, J Baumann, FH Evans-Lutterodt, K Ning, J Ma, Y Mcmacken, J Gossmann, HJ Silverman, P Rafferty, CS Hillenius, SJ
Citation: Hh. Vuong et al., Effect of implant damage on the gate oxide thickness, SOL ST ELEC, 43(5), 1999, pp. 985-988
Risultati: 1-10 |