AAAAAA

   
Results: 1-8 |
Results: 8

Authors: MOYER GC CLEMENTS M LIU WT SCHAFFER T CAVIN RK
Citation: Gc. Moyer et al., THE DELAY VERNIER PATTERN GENERATION TECHNIQUE, IEEE journal of solid-state circuits, 32(4), 1997, pp. 551-562

Authors: KANG JK LIU WT CAVIN RK
Citation: Jk. Kang et al., A CMOS HIGH-SPEED DATA RECOVERY CIRCUIT USING THE MATCHED DELAY SAMPLING TECHNIQUE, IEEE journal of solid-state circuits, 32(10), 1997, pp. 1588-1596

Authors: PERKINSON TL MCLARTY PK GYURCSIK RS CAVIN RK
Citation: Tl. Perkinson et al., SINGLE-WAFER CLUSTER TOOL PERFORMANCE - AN ANALYSIS OF THROUGHPUT, IEEE transactions on semiconductor manufacturing, 7(3), 1994, pp. 369-373

Authors: GRAY CT LIU WT CAVIN RK
Citation: Ct. Gray et al., TIMING CONSTRAINTS FOR WAVE-PIPELINED SYSTEMS, IEEE transactions on computer-aided design of integrated circuits and systems, 13(8), 1994, pp. 987-1004

Authors: GRAY CT LIU WT CAVIN RK HSIEH HY
Citation: Ct. Gray et al., CIRCUIT DELAY CALCULATION CONSIDERING DATA DEPENDENT DELAYS, Integration, 17(1), 1994, pp. 1-23

Authors: LIU WT GRAY CT FAN D FARLOW WJ HUGHES TA CAVIN RK
Citation: Wt. Liu et al., A 250-MHZ WAVE PIPELINED ADDER IN 2-MU-M CMOS, IEEE journal of solid-state circuits, 29(9), 1994, pp. 1117-1128

Authors: GRAY CT LIU WT VANNOIJE WAM HUGHES TA CAVIN RK
Citation: Ct. Gray et al., A SAMPLING TECHNIQUE AND ITS CMOS IMPLEMENTATION WITH 1 GB S BANDWIDTH AND 25 PS RESOLUTION/, IEEE journal of solid-state circuits, 29(3), 1994, pp. 340-349

Authors: CLEMENTS SM LIU W KANG J CAVIN RK
Citation: Sm. Clements et al., VERY HIGH-SPEED CONTINUOUS SAMPLING USING MATCHED DELAYS, Electronics Letters, 30(6), 1994, pp. 463-465
Risultati: 1-8 |