Authors:
DEUTSCH A
KOPCSAY GV
RESTLE PJ
SMITH HH
KATOPIS G
BECKER WD
COTEUS PW
SUROVIC CW
RUBIN BJ
DUNNE RP
GALLO T
JENKINS KA
TERMAN LM
DENNARD RH
SAIHALASZ GA
KRAUTER BL
KNEBEL DR
Citation: A. Deutsch et al., WHEN ARE TRANSMISSION-LINE EFFECTS IMPORTANT FOR ON-CHIP INTERCONNECTIONS, IEEE transactions on microwave theory and techniques, 45(10), 1997, pp. 1836-1846
Authors:
DEUTSCH A
KOPCSAY GV
SUROVIC CW
RUBIN BJ
TERMAN LM
DUNNE RP
GALLO TA
DENNARD RH
Citation: A. Deutsch et al., MODELING AND CHARACTERIZATION OF LONG ON-CHIP INTERCONNECTIONS FOR HIGHPERFORMANCE MICROPROCESSORS, IBM journal of research and development, 39(5), 1995, pp. 547-567
Authors:
SHAHIDI GG
WARNOCK JD
COMFORT J
FISCHER S
MCFARLAND PA
ACOVIC A
CHAPPELL TI
CHAPPELL BA
NING TH
ANDERSON CJ
DENNARD RH
SUN JYC
POLCARI MR
DAVARI B
Citation: Gg. Shahidi et al., CMOS SCALING IN THE 0.1-MU-M, 1.X-VOLT REGIME FOR HIGH-PERFORMANCE APPLICATIONS, IBM journal of research and development, 39(1-2), 1995, pp. 229-244