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Results: 1-6 |
Results: 6

Authors: ASSADERAGHI F SHAHIDI GG WAGNER L HSIEH M PELELLA M CHU S DENNARD RH DAVARI B
Citation: F. Assaderaghi et al., TRANSIENT PASS-TRANSISTOR LEAKAGE CURRENT IN SOI MOSFETS, IEEE electron device letters, 18(6), 1997, pp. 241-243

Authors: DEUTSCH A KOPCSAY GV RESTLE PJ SMITH HH KATOPIS G BECKER WD COTEUS PW SUROVIC CW RUBIN BJ DUNNE RP GALLO T JENKINS KA TERMAN LM DENNARD RH SAIHALASZ GA KRAUTER BL KNEBEL DR
Citation: A. Deutsch et al., WHEN ARE TRANSMISSION-LINE EFFECTS IMPORTANT FOR ON-CHIP INTERCONNECTIONS, IEEE transactions on microwave theory and techniques, 45(10), 1997, pp. 1836-1846

Authors: DAVARI B DENNARD RH SHAHIDI GG
Citation: B. Davari et al., CMOS SCALING FOR HIGH-PERFORMANCE AND LOW-POWER - THE NEXT 10 YEARS, Proceedings of the IEEE, 83(4), 1995, pp. 595-606

Authors: DEUTSCH A KOPCSAY GV SUROVIC CW RUBIN BJ TERMAN LM DUNNE RP GALLO TA DENNARD RH
Citation: A. Deutsch et al., MODELING AND CHARACTERIZATION OF LONG ON-CHIP INTERCONNECTIONS FOR HIGHPERFORMANCE MICROPROCESSORS, IBM journal of research and development, 39(5), 1995, pp. 547-567

Authors: SHAHIDI GG WARNOCK JD COMFORT J FISCHER S MCFARLAND PA ACOVIC A CHAPPELL TI CHAPPELL BA NING TH ANDERSON CJ DENNARD RH SUN JYC POLCARI MR DAVARI B
Citation: Gg. Shahidi et al., CMOS SCALING IN THE 0.1-MU-M, 1.X-VOLT REGIME FOR HIGH-PERFORMANCE APPLICATIONS, IBM journal of research and development, 39(1-2), 1995, pp. 229-244

Authors: SHAHIDI GG ANDERSON CA CHAPPELL BA CHAPPELL TI COMFORT JH DAVARI B DENNARD RH FRANCH RL MCFARLAND PA NEELY JS NING TH POLCARI MR WARNOCK JD
Citation: Gg. Shahidi et al., A ROOM-TEMPERATURE 0.1 MU-M CMOS ON SOI, I.E.E.E. transactions on electron devices, 41(12), 1994, pp. 2405-2412
Risultati: 1-6 |