Authors: Demeus, L Dessard, V Viviani, A Andriaensen, S Flandre, D

Citation: L. Demeus et al., Integrated sensor and electronic circuits in fully depleted SOI technologyfor high-temperature applications, IEEE IND E, 48(2), 2001, pp. 272-280

Authors: Flandre, D Adriaensen, S Akheyar, A Crahay, A Demeus, L Delatte, P Dessard, V Iniguez, B Neve, A Katschmarskyj, B Loumaye, P Laconte, J Martinez, I Picun, G Rauly, E Renaux, C Spote, D Zitout, M Dehan, M Parvais, B Simon, P Vanhoenacker, D Raskin, JP

Citation: D. Flandre et al., Fully depleted SOICMOS technology for heterogeneous micropower, high-temperature or RF microsystems, SOL ST ELEC, 45(4), 2001, pp. 541-549

Authors: Pavanello, MA Martino, JA Dessard, V Flandre, D

Citation: Ma. Pavanello et al., An asymmetric channel SOI nMOSFET for reducing parasitic effects and improving output characteristics, EL SOLID ST, 3(1), 2000, pp. 50-52

Authors: Pavanello, MA Martino, JA Dessard, V Flandre, D

Citation: Ma. Pavanello et al., Analog performance and application of graded-channel fully depleted SOI MOSFETs, SOL ST ELEC, 44(7), 2000, pp. 1219-1222

Authors: Iniguez, B Gentinne, B Dessard, V Flandre, D

Citation: B. Iniguez et al., A physically-based C-infinity-continuous model for accumulation-mode SOI pMOSFET's, IEEE DEVICE, 46(12), 1999, pp. 2295-2303