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Results: 1-3 |
Results: 3
SOI thermal impedance extraction methodology and its significance for circuit simulation
Authors: Jin, W Liu, WD Fung, SKH Chan, PCH Hu, CM
Citation: W. Jin et al., SOI thermal impedance extraction methodology and its significance for circuit simulation, IEEE DEVICE, 48(4), 2001, pp. 730-736
Shot-noise-induced excess low-frequency noise in floating-body partially depleted SOI MOSFET's
Authors: Jin, W Chan, PCH Fung, SKH Ko, PK
Citation: W. Jin et al., Shot-noise-induced excess low-frequency noise in floating-body partially depleted SOI MOSFET's, IEEE DEVICE, 46(6), 1999, pp. 1180-1185
Fully depleted CMOS/SOI device design guidelines for low-power applications
Authors: Banna, SR Chan, PCH Chan, MS Fung, SKH Ko, PK
Citation: Sr. Banna et al., Fully depleted CMOS/SOI device design guidelines for low-power applications, IEEE DEVICE, 46(4), 1999, pp. 754-761
Risultati: 1-3 |