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Results: 1-13 |
Results: 13
SPECIAL ISSUE ON HIGH-PERFORMANCE DISTRIBUTED COMPUTING
Authors: HARIRI S
Citation: S. Hariri, SPECIAL ISSUE ON HIGH-PERFORMANCE DISTRIBUTED COMPUTING, Journal of supercomputing, 11(2), 1997, pp. 99-99
A HIGH-PERFORMANCE MESSAGE-PASSING SYSTEM FOR NETWORK OF WORKSTATIONS
Authors: PARK SY HARIRI S
Citation: Sy. Park et S. Hariri, A HIGH-PERFORMANCE MESSAGE-PASSING SYSTEM FOR NETWORK OF WORKSTATIONS, Journal of supercomputing, 11(2), 1997, pp. 159-179
EFFICIENT COMMUNICATION ALGORITHMS FOR RING MULTICOMPUTERS
Authors: KEE KK HARIRI S
Citation: Kk. Kee et S. Hariri, EFFICIENT COMMUNICATION ALGORITHMS FOR RING MULTICOMPUTERS, The Journal of systems and software, 37(3), 1997, pp. 215-225
COMPILE-TIME PERFORMANCE PREDICTION OF HPF FORTRAN 90D/
Authors: PARASHAR M HARIRI S
Citation: M. Parashar et S. Hariri, COMPILE-TIME PERFORMANCE PREDICTION OF HPF FORTRAN 90D/, IEEE parallel & distributed technology, 4(1), 1996, pp. 57-73
DIRECT DETERMINATION OF LIMITING CYCLE DURING CYCLIC LOADING
Authors: VASSEUR E NAVIDI P HARIRI S
Citation: E. Vasseur et al., DIRECT DETERMINATION OF LIMITING CYCLE DURING CYCLIC LOADING, Computational materials science, 7(1-2), 1996, pp. 11-15
INFECTIOUS-DISEASE SURVEILLANCE ON THE INFORMATION SUPERHIGHWAY
Authors: NOTARI EP HARIRI S WILLIAMS AE
Citation: Ep. Notari et al., INFECTIOUS-DISEASE SURVEILLANCE ON THE INFORMATION SUPERHIGHWAY, Transfusion, 36(9), 1996, pp. 57-57
EFFECTS OF TECHNOLOGY MAPPING ON FAULT-DETECTION COVERAGE IN REPROGRAMMABLE FPGAS
Authors: KWIAT K DEBANY W HARIRI S
Citation: K. Kwiat et al., EFFECTS OF TECHNOLOGY MAPPING ON FAULT-DETECTION COVERAGE IN REPROGRAMMABLE FPGAS, IEE proceedings. Computers and digital techniques, 142(6), 1995, pp. 407-410
DESIGN TECHNIQUES FOR FAULT-TOLERANT SYSTOLIC ARRAYS
Authors: ESONU MO ALKHALILI AJ HARIRI S ALKHALILI D
Citation: Mo. Esonu et al., DESIGN TECHNIQUES FOR FAULT-TOLERANT SYSTOLIC ARRAYS, Journal of VLSI signal processing, 11(1-2), 1995, pp. 151-168
AREA-EFFICIENT COMPUTING STRUCTURES FOR CONCURRENT ERROR-DETECTION INSYSTOLIC ARRAYS
Authors: ESONU MO ALKHALILI AJ HARIRI S
Citation: Mo. Esonu et al., AREA-EFFICIENT COMPUTING STRUCTURES FOR CONCURRENT ERROR-DETECTION INSYSTOLIC ARRAYS, Journal of VLSI signal processing, 10(3), 1995, pp. 237-260
HIERARCHICAL MODELING OF AVAILABILITY IN DISTRIBUTED SYSTEMS
Authors: HARIRI S MUTLU H
Citation: S. Hariri et H. Mutlu, HIERARCHICAL MODELING OF AVAILABILITY IN DISTRIBUTED SYSTEMS, IEEE transactions on software engineering, 21(1), 1995, pp. 50-56
FAULT-TOLERANT DESIGN METHODOLOGY FOR SYSTOLIC ARRAY ARCHITECTURES
Authors: ESONU MO ALKHALILI AJ HARIRI S ALKHALILI D
Citation: Mo. Esonu et al., FAULT-TOLERANT DESIGN METHODOLOGY FOR SYSTOLIC ARRAY ARCHITECTURES, IEE proceedings. Computers and digital techniques, 141(1), 1994, pp. 17-28
DESIGN AND ANALYSIS OF AN OPTICAL COMMUNICATIONS PROCESSOR
Authors: SONG QW HARIRI S CHOUDHARY A
Citation: Qw. Song et al., DESIGN AND ANALYSIS OF AN OPTICAL COMMUNICATIONS PROCESSOR, Journal of parallel and distributed computing, 17(3), 1993, pp. 222-229
GIGABIT REVOLUTION TRANSCENDS THE MEGABIT REVOLUTION, SAYS SYMPOSIUM KEYNOTER
Authors: RAGHAVENDRA CS HARIRI S
Citation: Cs. Raghavendra et S. Hariri, GIGABIT REVOLUTION TRANSCENDS THE MEGABIT REVOLUTION, SAYS SYMPOSIUM KEYNOTER, Computer, 26(12), 1993, pp. 75-75
Risultati: 1-13 |