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Results: 3
Decomposition and technology mapping of speed-independent circuits using Boolean relations
Authors:
Cortadella, J Kishinevsky, M Kondratyev, A Lavagno, L Pastor, E Yakovlev, A
Citation:
J. Cortadella et al., Decomposition and technology mapping of speed-independent circuits using Boolean relations, IEEE COMP A, 18(9), 1999, pp. 1221-1236
Logic decomposition of speed-independent circuits
Authors:
Kondratyev, A Cortadella, J Kishinevsky, M Lavagno, L Yakovlev, A
Citation:
A. Kondratyev et al., Logic decomposition of speed-independent circuits, P IEEE, 87(2), 1999, pp. 347-362
Partial-scan delay fault testing of asynchronous circuits
Authors:
Kishinevsky, M Kondratyev, A Lavagno, L Saldanha, A Taubin, A
Citation:
M. Kishinevsky et al., Partial-scan delay fault testing of asynchronous circuits, IEEE COMP A, 17(11), 1998, pp. 1184-1199
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