Authors:
Hoelzl, R
Fabry, L
Range, KJ
Wahlich, R
Kissinger, G
Citation: R. Hoelzl et al., Enhancement of gettering efficiencies of different silicon substrates during a 0.18 mu m LTB CMOS process simulation - Stratigraphy by a novel chemical ultra-trace depth-profiling, MICROEL ENG, 56(1-2), 2001, pp. 153-156
Authors:
Muller, T
Kissinger, G
Benkitsch, AC
Brand, O
Baltes, H
Citation: T. Muller et al., Assessment of silicon wafer material for the fabrication of integrated circuit sensors, J ELCHEM SO, 147(4), 2000, pp. 1604-1611
Authors:
Lambert, U
Huber, A
Grabmeier, J
Obermeier, G
Vanhellemont, J
Wahlich, R
Kissinger, G
Citation: U. Lambert et al., Dependence of gate oxide integrity on grown-in defect density in Czochralski grown silicon, MICROEL ENG, 48(1-4), 1999, pp. 127-130
Authors:
Kissinger, G
Grabolla, T
Morgenstern, G
Richter, H
Graf, D
Vanhellemont, J
Lambert, U
von Ammon, W
Citation: G. Kissinger et al., Grown-in oxide precipitate nuclei in Czochralski silicon substrates and their role in device processing, J ELCHEM SO, 146(5), 1999, pp. 1971-1976