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Results:
1-9
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Results: 9
Authors:
TOUBA NA
MCCLUSKEY EJ
Citation: Na. Touba et Ej. Mccluskey, LOGIC SYNTHESIS OF MULTILEVEL CIRCUITS WITH CONCURRENT ERROR-DETECTION, IEEE transactions on computer-aided design of integrated circuits and systems, 16(7), 1997, pp. 783-789
Authors:
SAXENA NR
MCCLUSKEY EJ
Citation: Nr. Saxena et Ej. Mccluskey, PARALLEL SIGNATURE ANALYSIS DESIGN WITH BOUNDS ON ALIASING, I.E.E.E. transactions on computers, 46(4), 1997, pp. 425-438
Authors:
SAXENA NR
MCCLUSKEY EJ
Citation: Nr. Saxena et Ej. Mccluskey, COUNTING 2-STATE TRANSITION-TOUR SEQUENCES, I.E.E.E. transactions on computers, 45(11), 1996, pp. 1337-1342
Authors:
FURUYA K
SEKI S
MCCLUSKEY EJ
Citation: K. Furuya et al., DESIGN OF AUTONOMOUS TPG CIRCUITS FOR USE IN 2-PATTERN TESTING, IEICE transactions on information and systems, E78D(7), 1995, pp. 882-888
Authors:
MA SC
MCCLUSKEY EJ
Citation: Sc. Ma et Ej. Mccluskey, OPEN FAULTS IN BICMOS GATES, IEEE transactions on computer-aided design of integrated circuits and systems, 14(5), 1995, pp. 567-575
Authors:
BOLEY D
GOLUB GH
MAKAR S
SAXENA N
MCCLUSKEY EJ
Citation: D. Boley et al., FLOATING-POINT FAULT-TOLERANCE WITH BACKWARD ERROR ASSERTIONS, I.E.E.E. transactions on computers, 44(2), 1995, pp. 302-311
Authors:
SAXENA NR
MCCLUSKEY EJ
Citation: Nr. Saxena et Ej. Mccluskey, LINEAR COMPLEXITY ASSERTIONS FOR SORTING, IEEE transactions on software engineering, 20(6), 1994, pp. 424-431
Authors:
FURUYA K
MCCLUSKEY EJ
Citation: K. Furuya et Ej. Mccluskey, 2-PATTERN TEST CAPABILITIES OF AUTONOMOUS TGP CIRCUITS, IEICE transactions on information and systems, E76D(7), 1993, pp. 800-808
Authors:
HAO H
MCCLUSKEY EJ
Citation: H. Hao et Ej. Mccluskey, ANALYSIS OF GATE OXIDE SHORTS IN CMOS CIRCUITS, I.E.E.E. transactions on computers, 42(12), 1993, pp. 1510-1516
Risultati:
1-9
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