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Results:
1-7
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Results: 7
Authors:
Mattausch, HJ
Kishi, K
Gyohten, T
Citation: Hj. Mattausch et al., Area-efficient multi-port SRAMs for on-chip data-storage with high random-access bandwidth and large storage capacity, IEICE TR EL, E84C(3), 2001, pp. 410-417
Authors:
Miura-Mattausch, M
Suetake, M
Mattausch, HJ
Kumashiro, S
Shigyo, N
Odanaka, S
Nakayama, N
Citation: M. Miura-mattausch et al., Physical modeling of the reverse-short-channel effect for circuit simulation, IEEE DEVICE, 48(10), 2001, pp. 2449-2452
Authors:
Omori, N
Mattausch, HJ
Citation: N. Omori et Hj. Mattausch, Compact central arbiters for memories with multiple read/write ports, ELECTR LETT, 37(13), 2001, pp. 811-813
Authors:
Mattausch, HJ
Baumgartner, H
Allinger, R
Kerber, M
Braun, H
Citation: Hj. Mattausch et al., Electrical/thermal properties of nonplanar polyoxides and the consequent effects for EEPROM cell operation, IEEE DEVICE, 47(6), 2000, pp. 1251-1257
Authors:
Ono, T
Miura-Mattausch, M
Baumgartner, H
Mattausch, HJ
Citation: T. Ono et al., Superstable neutral electron traps in nonplanar thermal oxides on monocrystalline silicon, APPL PHYS L, 76(16), 2000, pp. 2298-2300
Authors:
Tatsumi, Y
Mattausch, HJ
Citation: Y. Tatsumi et Hj. Mattausch, Fast quadratic increase of multiport-storage-cell area with port number, ELECTR LETT, 35(25), 1999, pp. 2185-2187
Authors:
Mattausch, HJ
Citation: Hj. Mattausch, Hierarchical architecture for area-efficient integrated N-port memories with latency-free multi-gigabit per second access bandwidth, ELECTR LETT, 35(17), 1999, pp. 1441-1443
Risultati:
1-7
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