Authors:
ASARI K
HIRANO H
HONDA T
SUMI T
TAKEO M
MORIWAKI N
NAKANE G
NAKAKUMA T
CHAYA S
MUKUNOKI T
JUDAI Y
AZUMA M
SHIMADA Y
OTSUKI T
Citation: K. Asari et al., FERROELECTRIC MEMORY CIRCUIT TECHNOLOGY AND THE APPLICATION TO CONTACTLESS IC CARD, IEICE transactions on electronics, E81C(4), 1998, pp. 488-496
Authors:
HIRANO H
HONDA T
MORIWAKI N
NAKAKUMA T
INOUE A
NAKANE G
CHAYA S
SUMI T
Citation: H. Hirano et al., 2-V 100-NS 1T/1C NONVOLATILE FERROELECTRIC MEMORY ARCHITECTURE WITH BITLINE-DRIVEN READ SCHEME AND NONRELAXATION REFERENCE CELL/, IEEE journal of solid-state circuits, 32(5), 1997, pp. 649-654
Authors:
SUMI T
MORIWAKI N
NAKANE G
NAKAKUMA T
JUDAI Y
UEMOTO Y
NAGANO Y
HAYASHI S
AZUMA M
OTSUKI T
KANO G
CUCHIARO JD
SCOTT MC
MCMILLAN LD
DEARAUJO CAP
Citation: T. Sumi et al., 256KB FERROELECTRIC NONVOLATILE MEMORY TECHNOLOGY FOR 1T 1C CELL WITH100NS READ/WRITE TIME AT 3V/, Integrated ferroelectrics, 6(1-4), 1995, pp. 1-13