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Results: 1-11 |
Results: 11
Silicon-on-insulator processes for the fabrication of novel nanostructures
Authors: Bourland, S Denton, J Ikram, A Neudeck, GW Bashir, R
Citation: S. Bourland et al., Silicon-on-insulator processes for the fabrication of novel nanostructures, J VAC SCI B, 19(5), 2001, pp. 1995-1997
Nitrided thermal SiO2 for use as top and bottom gate insulators in self-aligned double gate silicon-on-insulator metal-oxide-semiconductor field effect transistor
Authors: Ahmed, SS Denton, JP Neudeck, GW
Citation: Ss. Ahmed et al., Nitrided thermal SiO2 for use as top and bottom gate insulators in self-aligned double gate silicon-on-insulator metal-oxide-semiconductor field effect transistor, J VAC SCI B, 19(3), 2001, pp. 800-806
Edge transistor elimination in oxide trench isolated N-channel metal-oxide-semiconductor field effect transistors
Authors: Yang, JN Denton, JP Neudeck, GW
Citation: Jn. Yang et al., Edge transistor elimination in oxide trench isolated N-channel metal-oxide-semiconductor field effect transistors, J VAC SCI B, 19(2), 2001, pp. 327-332
Reduction of sidewall defect induced leakage currents by the use of nitrided field oxides in silicon selective epitaxial growth isolation for advanced ultralarge scale integration
Authors: Bashir, R Su, T Sherman, JM Neudeck, GW Denton, J Obeidat, A
Citation: R. Bashir et al., Reduction of sidewall defect induced leakage currents by the use of nitrided field oxides in silicon selective epitaxial growth isolation for advanced ultralarge scale integration, J VAC SCI B, 18(2), 2000, pp. 695-699
On the design of piezoresistive silicon cantilevers with stress concentration regions for scanning probe microscopy applications
Authors: Bashir, R Gupta, A Neudeck, GW McElfresh, M Gomez, R
Citation: R. Bashir et al., On the design of piezoresistive silicon cantilevers with stress concentration regions for scanning probe microscopy applications, J MICROM M, 10(4), 2000, pp. 483-491
Defect analysis of a MELO-Si over SiO2 strips of different widths and spacings
Authors: Pak, JJ Kim, BS Neudeck, GW
Citation: Jj. Pak et al., Defect analysis of a MELO-Si over SiO2 strips of different widths and spacings, J KOR PHYS, 37(6), 2000, pp. 980-983
On the design and fabrication of novel lateral bipolar transistor in a deep-submicron technology
Authors: Gomez, R Bashir, R Neudeck, GW
Citation: R. Gomez et al., On the design and fabrication of novel lateral bipolar transistor in a deep-submicron technology, MICROELEC J, 31(3), 2000, pp. 199-205
Unique method to electrically characterize a single stacking fault in silicon-on-insulator metal-oxide-semiconductor field-effect transistors
Authors: Yang, J Neudeck, GW Denton, JP
Citation: J. Yang et al., Unique method to electrically characterize a single stacking fault in silicon-on-insulator metal-oxide-semiconductor field-effect transistors, APPL PHYS L, 77(24), 2000, pp. 4034-4036
Multiple layers of silicon-on-insulator for nanostructure devices
Authors: Neudeck, GW Pae, SW Denton, JP Su, T
Citation: Gw. Neudeck et al., Multiple layers of silicon-on-insulator for nanostructure devices, J VAC SCI B, 17(3), 1999, pp. 994-998
Resonant-cavity-enhanced high-speed Si photodiode grown by epitaxial lateral overgrowth
Authors: Schaub, JD Li, R Schow, CL Campbell, JC Neudeck, GW Denton, J
Citation: Jd. Schaub et al., Resonant-cavity-enhanced high-speed Si photodiode grown by epitaxial lateral overgrowth, IEEE PHOTON, 11(12), 1999, pp. 1647-1649
Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth
Authors: Pae, S Su, TC Denton, JP Neudeck, GW
Citation: S. Pae et al., Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth, IEEE ELEC D, 20(5), 1999, pp. 194-196
Risultati: 1-11 |