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Citation: Pu. Kenkare et al., SCALING OF POLY-ENCAPSULATED LOCOS FOR 0.35 MU-M CMOS TECHNOLOGY (VOL41, PG 56, 1994), I.E.E.E. transactions on electron devices, 42(8), 1995, pp. 1564-1564

Authors: KING TJ MCVITTIE JP SARASWAT KC PFIESTER JR

Citation: Tj. King et al., ELECTRICAL-PROPERTIES OF HEAVILY-DOPED POLYCRYSTALLINE SILICON-GERMANIUM FILMS, I.E.E.E. transactions on electron devices, 41(2), 1994, pp. 228-232

Authors: KENKARE PU MAZURE C HAYDEN JD PFIESTER JR KO J KIRSCH HC AJURIA SA CRABTREE P VUONG T

Citation: Pu. Kenkare et al., SCALING OF POLY-ENCAPSULATED LOCOS FOR 0.35 MU-M CMOS TECHNOLOGY, I.E.E.E. transactions on electron devices, 41(1), 1994, pp. 56-62

Authors: HAYDEN JD BURNETT JD PFIESTER JR WOO MP

Citation: Jd. Hayden et al., A NEW TECHNIQUE FOR FORMING A SHALLOW LINK BASE IN A DOUBLE POLYSILICON BIPOLAR-TRANSISTOR, I.E.E.E. transactions on electron devices, 41(1), 1994, pp. 63-68