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Results:
1-7
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Results: 7
Authors:
KNEIP J
BEREKOVIC M
WITTENBURG JP
HINRICHS W
PIRSCH P
Citation: J. Kneip et al., AN ALGORITHM ADAPTED AUTONOMOUS CONTROLLING CONCEPT FOR A PARALLEL SINGLE-CHIP DIGITAL SIGNAL PROCESSOR, Journal of VLSI signal processing systems for signal, image, and video technology, 16(1), 1997, pp. 31-40
Authors:
PIRSCH P
STOLBERG HJ
CHEN YK
KUNG SY
Citation: P. Pirsch et al., IMPLEMENTATION OF MEDIA PROCESSORS, IEEE signal processing magazine, 14(4), 1997, pp. 48-51
Authors:
ACKLAND B
NISHITANI T
PIRSCH P
Citation: B. Ackland et al., SPECIAL ISSUE ON VLSI FOR VIDEO SIGNAL-PROCESSING, IEEE transactions on circuits and systems for video technology, 5(5), 1995, pp. 377-379
Authors:
SCHONFELD M
FRANZEN J
SCHWIEGERSHAUSEN M
PIRSCH P
VEHLIES U
MUNZNER A
Citation: M. Schonfeld et al., THE LISA DESIGN ENVIRONMENT FOR THE SYNTHESIS OF ARRAY PROCESSORS INCLUDING MEMORIES FOR THE DATA TRANSFER AND FAULT-TOLERANCE BY RECONFIGURATION AND CODING TECHNIQUES, Journal of VLSI signal processing, 11(1-2), 1995, pp. 51-74
Authors:
KNEIP J
OHMACHT M
RONNER K
PIRSCH P
Citation: J. Kneip et al., ARCHITECTURE AND C-PROGRAMMING ENVIRONMENT OF A HIGHLY PARALLEL IMAGESIGNAL PROCESSOR(+), Microprocessing and microprogramming, 41(5-6), 1995, pp. 391-408
Authors:
PIRSCH P
DEMASSIEUX N
GEHRKE W
Citation: P. Pirsch et al., VLSI ARCHITECTURES FOR VIDEO COMPRESSION - A SURVEY, Proceedings of the IEEE, 83(2), 1995, pp. 220-246
Authors:
WINZKER M
GRUGER K
GEHRKE W
PIRSCH P
Citation: M. Winzker et al., VLSI CHIP SET FOR 2D HDTV SUBBAND FILTERING WITH ON-CHIP LINE MEMORIES, IEEE journal of solid-state circuits, 28(12), 1993, pp. 1354-1361
Risultati:
1-7
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