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Citation: C. Pacha et al., Threshold logic circuit design of parallel adders using resonant tunnelingdevices, IEEE VLSI, 8(5), 2000, pp. 558-572

Authors: Pacha, C Kessler, O Glosekotter, P Goser, KF Prost, W Brennemann, A Auer, U Tegude, FJ

Citation: C. Pacha et al., Parallel adder design with reduced circuit complexity using resonant tunneling transistors and threshold logic, ANALOG IN C, 24(1), 2000, pp. 7-25

Authors: Prost, W Auer, U Tegude, FJ Pacha, C Goser, KF Janssen, G van der Roer, T

Citation: W. Prost et al., Manufacturability and robust design of nanoelectronic logic circuits basedon resonant tunnelling diodes, INT J CIRCU, 28(6), 2000, pp. 537-552