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Results: 1-4 |
Results: 4

Authors: Kranitis, N Paschalis, A Gizopoulos, D Psarakis, M Zorian, Y
Citation: N. Kranitis et al., An effective deterministic BIST scheme for shifter/accumulator pairs in datapaths, J ELEC TEST, 17(2), 2001, pp. 97-107

Authors: Kranitis, N Gizopoulos, D Paschalis, A Psarakis, M Zorian, Y
Citation: N. Kranitis et al., Power-/energy-efficient BIST schemes for processor data paths, IEEE DES T, 17(4), 2000, pp. 15-28

Authors: Psarakis, M Gizopoulos, D Paschalis, A Zorian, Y
Citation: M. Psarakis et al., Sequential fault modeling and test pattern generation for CMOS iterative logic arrays, IEEE COMPUT, 49(10), 2000, pp. 1083-1099

Authors: Psarakis, M Gizopoulos, D Paschalis, A
Citation: M. Psarakis et al., Test generation and fault simulation for cell fault model using stuck-at fault model based test tools, J ELEC TEST, 13(3), 1998, pp. 315-319
Risultati: 1-4 |