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Citation: Sf. Hsiao et Wr. Shiue, A new hardware-efficient algorithm and architecture for computation of 2-DDCTs on a linear array, IEEE CIR SV, 11(11), 2001, pp. 1149-1159

Authors: Hsiao, SF Shiue, WR Tseng, JM

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Authors: Hsiao, SF Shiue, WR

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Authors: Hsiao, SF Shiue, WR Tseng, JM

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