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Results:
1-8
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Results: 8
Authors:
Kagaris, D
Tragoudas, S
Citation: D. Kagaris et S. Tragoudas, Computational analysis of counter-based schemes for VLSI test pattern generation, DISCR APP M, 110(2-3), 2001, pp. 227-250
Authors:
Kagaris, D
Tragoudas, S
Citation: D. Kagaris et S. Tragoudas, Von Neumann hybrid cellular automata for generating deterministic test sequences, ACM T DES A, 6(3), 2001, pp. 308-321
Authors:
Kagaris, D
Tragoudas, S
Majumdar, A
Citation: D. Kagaris et al., Test-set partitioning for multi-weighted random LFSRs, INTEGRATION, 30(1), 2000, pp. 65-75
Authors:
Tragoudas, S
Muenzenberger, R
Danhof, KJ
Citation: S. Tragoudas et al., Board-level partitioning for partial scan using fuzzy logic, IEEE FUZ SY, 7(2), 1999, pp. 241-249
Authors:
Tragoudas, S
Karayiannis, D
Citation: S. Tragoudas et D. Karayiannis, A fast nonenumerative automatic test pattern generator for path delay faults, IEEE COMP A, 18(7), 1999, pp. 1050-1057
Authors:
Kagaris, D
Tragoudas, S
Citation: D. Kagaris et S. Tragoudas, On the design of optimal counter-based schemes for test set embedding, IEEE COMP A, 18(2), 1999, pp. 219-230
Authors:
Kagaris, D
Tragoudas, S
Citation: D. Kagaris et S. Tragoudas, Maximum weighted independent sets on transitive graphs and applications, INTEGRATION, 27(1), 1999, pp. 77-86
Authors:
Kagaris, D
Pantziou, GE
Tragoudas, S
Zaroliagis, CD
Citation: D. Kagaris et al., Transmissions in a network with capacities and delays, NETWORKS, 33(3), 1999, pp. 167-174
Risultati:
1-8
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