ACNP - Italian Periodicals Catalogue

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Results: 1-9 |

Results: 9

Synthesis of an 8051-like micro-controller tolerant to transient faults

Authors: Cota, E Lima, F Rezgui, S Carro, L Velazco, R Lubaszewski, M Reis, R

Citation: E. Cota et al., Synthesis of an 8051-like micro-controller tolerant to transient faults, J ELEC TEST, 17(2), 2001, pp. 149-161

Estimating error rates in processor-based architectures

Authors: Rezgui, S Velazco, R Ecoffet, R Rodriguez, S Mingo, JR

Citation: S. Rezgui et al., Estimating error rates in processor-based architectures, IEEE NUCL S, 48(5), 2001, pp. 1680-1687

Experimentally evaluating an automatic approach for generating safety-critical software with respect to transient errors

Authors: Cheynet, P Nicolescu, B Velazco, R Rebaudengo, M Reorda, MS Violante, M

Citation: P. Cheynet et al., Experimentally evaluating an automatic approach for generating safety-critical software with respect to transient errors, IEEE NUCL S, 47(6), 2000, pp. 2231-2236

Predicting error rate for microprocessor-based digital architectures through CEU (Code Emulating Upsets) injection

Authors: Velazco, R Rezgui, S Ecoffet, R

Citation: R. Velazco et al., Predicting error rate for microprocessor-based digital architectures through CEU (Code Emulating Upsets) injection, IEEE NUCL S, 47(6), 2000, pp. 2405-2411

Deep submicron CMOS technologies for the LHC experiments

Authors: Jarron, P Anelli, G Calin, T Cosculluela, J Campbell, B Delmastro, M Faccio, F Giraldo, A Heijne, E Kloukinas, K Letheren, M Nicolaidis, M Moreira, P Paccagnella, A Marchioro, A Snoeys, W Velazco, R

Citation: P. Jarron et al., Deep submicron CMOS technologies for the LHC experiments, NUCL PH B-P, 78, 1999, pp. 625-634

Single event effects in static and dynamic registers in a 0.25 mu m CMOS technology

Authors: Faccio, F Kloukinas, K Marchioro, A Calin, T Cosculluela, J Nicolaidis, M Velazco, R

Citation: F. Faccio et al., Single event effects in static and dynamic registers in a 0.25 mu m CMOS technology, IEEE NUCL S, 46(6), 1999, pp. 1434-1439

SEU testing of a novel hardened register implemented using standard CMOS technology

Authors: Monnier, T Roche, FM Cosculluela, J Velazco, R

Citation: T. Monnier et al., SEU testing of a novel hardened register implemented using standard CMOS technology, IEEE NUCL S, 46(6), 1999, pp. 1440-1444

SEU induced errors observed in microprocessor systems

Authors: Asenek, V Underwood, C Velazco, R Rezgui, S Oldfield, M Cheynet, P Ecoffet, R

Citation: V. Asenek et al., SEU induced errors observed in microprocessor systems, IEEE NUCL S, 45(6), 1998, pp. 2876-2883

Digital fuzzy control: A robust alternative suitable for space application

Authors: Cheynet, P Velazco, R Rezgui, S Peters, L Beck, K Ecoffet, R

Citation: P. Cheynet et al., Digital fuzzy control: A robust alternative suitable for space application, IEEE NUCL S, 45(6), 1998, pp. 2941-2947

Risultati: 1-9 |