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Results: 1-11 |
Results: 11
THE OFFSET CUBE - A 3-DIMENSIONAL MULTICOMPUTER NETWORK TOPOLOGY USING THROUGH-WAFER OPTICS
Authors: LACY WS CRUZRIVERA JL WILLS DS
Citation: Ws. Lacy et al., THE OFFSET CUBE - A 3-DIMENSIONAL MULTICOMPUTER NETWORK TOPOLOGY USING THROUGH-WAFER OPTICS, IEEE transactions on parallel and distributed systems, 9(9), 1998, pp. 893-908
OPTIMAL USAGE OF AVAILABLE WIRING RESOURCES IN DIFFRACTIVE-REFLECTIVEOPTOELECTRONIC MULTICHIP MODULES
Authors: CRUZRIVERA JL WILLS DS GAYLORD TK GLYTSIS EN
Citation: Jl. Cruzrivera et al., OPTIMAL USAGE OF AVAILABLE WIRING RESOURCES IN DIFFRACTIVE-REFLECTIVEOPTOELECTRONIC MULTICHIP MODULES, Applied optics, 37(2), 1998, pp. 233-253
EARLY ANALYSIS OF COST PERFORMANCE TRADE-OFFS IN MCM SYSTEMS/
Authors: GARG V STOGNER DJ ULMER C SCHIMMEL DE DISLIS C YALAMANCHILI S WILLS DS
Citation: V. Garg et al., EARLY ANALYSIS OF COST PERFORMANCE TRADE-OFFS IN MCM SYSTEMS/, IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging, 20(3), 1997, pp. 308-319
US AGRICULTURAL EXPORTS - A BALANCED REGIONAL MODEL
Authors: WILLS DS LEE C
Citation: Ds. Wills et C. Lee, US AGRICULTURAL EXPORTS - A BALANCED REGIONAL MODEL, Journal of agricultural and resource economics, 22(2), 1997, pp. 394-394
HIGH-THROUGHPUT, LOW-MEMORY APPLICATIONS ON THE PICA ARCHITECTURE
Authors: WILLS DS CAT HH CRUZRIVERA J LACY WS BAKER JM EBLE JC LOPEZLAGUNAS A HOPPER M
Citation: Ds. Wills et al., HIGH-THROUGHPUT, LOW-MEMORY APPLICATIONS ON THE PICA ARCHITECTURE, IEEE transactions on parallel and distributed systems, 8(10), 1997, pp. 1055-1067
IMPROVEMENT IN BIT-ERROR RATE FOR OPTOELECTRONIC MULTICOMPUTER INTERCONNECTION NETWORKS USING CYCLIC REDUNDANCY CODE ERROR-DETECTION
Authors: MAY P CROSS J LOPEZLAGUNAS A BUCHANAN B WILLS DS JOKERST NM BROOKE M
Citation: P. May et al., IMPROVEMENT IN BIT-ERROR RATE FOR OPTOELECTRONIC MULTICOMPUTER INTERCONNECTION NETWORKS USING CYCLIC REDUNDANCY CODE ERROR-DETECTION, IEEE photonics technology letters, 9(6), 1997, pp. 848-850
A 100 MBPS LED THROUGH-WAFER OPTOELECTRONIC LINK FOR MULTICOMPUTER INTERCONNECTION NETWORKS
Authors: MAY P LEE MH WILKINSON ST VENDIER O HO Z BOND SW WILLS DS BROOKE M JOKERST NM BROWN A
Citation: P. May et al., A 100 MBPS LED THROUGH-WAFER OPTOELECTRONIC LINK FOR MULTICOMPUTER INTERCONNECTION NETWORKS, Journal of parallel and distributed computing, 41(1), 1997, pp. 3-19
PROCESSING ARCHITECTURES FOR SMART PIXEL SYSTEMS
Authors: WILLS DS BAKER JM CAT HH CHAI SM CODRESCU L CRUZRIVERA J EBLE JC GENTILE A HOPPER MA LACY WS LOPEZLAGUNAS A MAY P SMITH S TAHA T
Citation: Ds. Wills et al., PROCESSING ARCHITECTURES FOR SMART PIXEL SYSTEMS, IEEE journal of selected topics in quantum electronics, 2(1), 1996, pp. 24-34
A 3-DIMENSIONAL HIGH-THROUGHPUT ARCHITECTURE USING THROUGH-WAFER OPTICAL INTERCONNECT (VOL 13, PG 1085, 1995)
Authors: JOKERST NM WILLS DS
Citation: Nm. Jokerst et Ds. Wills, A 3-DIMENSIONAL HIGH-THROUGHPUT ARCHITECTURE USING THROUGH-WAFER OPTICAL INTERCONNECT (VOL 13, PG 1085, 1995), Journal of lightwave technology, 13(9), 1995, pp. 1935-1935
A 3-DIMENSIONAL HIGH-THROUGHPUT ARCHITECTURE USING THROUGH-WAFER OPTICAL INTERCONNECT
Authors: WILLS DS LACY WS CAMPERIGINESTET C BUCHANAN B CAT HH WILKINSON S LEE MH JOKERST NM BROOKE MA
Citation: Ds. Wills et al., A 3-DIMENSIONAL HIGH-THROUGHPUT ARCHITECTURE USING THROUGH-WAFER OPTICAL INTERCONNECT, Journal of lightwave technology, 13(6), 1995, pp. 1085-1092
PARALLELIZED FORMULATION OF THE MAXIMUM LIKELIHOOD-EXPECTATION MAXIMIZATION ALGORITHM FOR FINE-GRAIN MESSAGE-PASSING ARCHITECTURES
Authors: CRUZRIVERA JL DIBELLA EVR WILLS DS GAYLORD TK GLYTSIS EN
Citation: Jl. Cruzrivera et al., PARALLELIZED FORMULATION OF THE MAXIMUM LIKELIHOOD-EXPECTATION MAXIMIZATION ALGORITHM FOR FINE-GRAIN MESSAGE-PASSING ARCHITECTURES, IEEE transactions on medical imaging, 14(4), 1995, pp. 758-762
Risultati: 1-11 |