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Table of contents of journal: *IEEE transactions on electron devices

Results: 1-25/3259

Authors: Farahmand, M Brennan, KF Gebara, E Heo, D Suh, Y Laskar, J
Citation: M. Farahmand et al., Theoretical study of RF-breakdown in bulk GaN and GaN MESFETs, IEEE DEVICE, 48(9), 2001, pp. 1844-1849

Authors: Boroumand, FA Swanson, JG
Citation: Fa. Boroumand et Jg. Swanson, Observations of backgate impedance dispersion in GaAs isolation structures, IEEE DEVICE, 48(9), 2001, pp. 1850-1858

Authors: Boroumand, FA Swanson, JG
Citation: Fa. Boroumand et Jg. Swanson, A comprehensive model of backgate impedance dispersions in GaAs isolation structures, IEEE DEVICE, 48(9), 2001, pp. 1859-1869

Authors: Arnold, E Alok, D
Citation: E. Arnold et D. Alok, Effect of interface states on electron transport in 4H-SiC inversion layers, IEEE DEVICE, 48(9), 2001, pp. 1870-1877

Authors: Gamiz, F Roldan, JB Kosina, H Grasser, T
Citation: F. Gamiz et al., Improving strained-Si on Si1-xGex deep submicron MOSFETs performance by means of a stepped doping profile, IEEE DEVICE, 48(9), 2001, pp. 1878-1884

Authors: Zhang, Q Liou, JJ McMacken, J Thomson, J Layman, P
Citation: Q. Zhang et al., Development of robust interconnect model based on design of experiments and multiobjective optimization, IEEE DEVICE, 48(9), 2001, pp. 1885-1891

Authors: Genoe, J Coppee, D Stiens, JH Vounckx, RA Kuijk, M
Citation: J. Genoe et al., Calculation of the current response of the spatially modulated light CMOS detector, IEEE DEVICE, 48(9), 2001, pp. 1892-1902

Authors: Jang, SH Cho, KD Tae, HS Choi, KC Lee, SH
Citation: Sh. Jang et al., Improvement of luminance and luminous efficiency using address voltage pulse during sustain-period of AC-PDP, IEEE DEVICE, 48(9), 2001, pp. 1903-1910

Authors: Mahapatro, AK Ghosh, S
Citation: Ak. Mahapatro et S. Ghosh, High rectification in metal-phthalocyanine based single layer devices, IEEE DEVICE, 48(9), 2001, pp. 1911-1914

Authors: Furumiya, M Hatano, K Murakami, I Kawasaki, T Ogawa, C Nakashiba, Y
Citation: M. Furumiya et al., A 1/3-in 1.3 M-pixel single-layer electrode CCD with a high-frame-rate skip mode, IEEE DEVICE, 48(9), 2001, pp. 1915-1921

Authors: Furumiya, M Suwazono, S Morimoto, M Nakashiba, Y Kawakami, Y Nakano, T Satoh, T Katoh, S Syohji, D Utsumi, H Taniji, Y Mutoh, N Orihara, K Teranishi, N
Citation: M. Furumiya et al., A 30 frames/s 2/3-in 1.3 M-pixel progressive scan IT-CCD image sensor, IEEE DEVICE, 48(9), 2001, pp. 1922-1928

Authors: Dieci, D Sozzi, G Menozzi, R Tediosi, E Lanzieri, C Canali, C
Citation: D. Dieci et al., Electric-field-related reliability of AlGaAs/GaAs power HFETs: Bias dependence and correlation with breakdown, IEEE DEVICE, 48(9), 2001, pp. 1929-1937

Authors: Liu, WC Pan, HJ Chen, HI Lin, KW Cheng, SY Yu, KH
Citation: Wc. Liu et al., Hydrogen-sensitive characteristics of a novel Pd/InP MOS Schottky diode hydrogen sensor, IEEE DEVICE, 48(9), 2001, pp. 1938-1944

Authors: Metz, M Baltes, H
Citation: M. Metz et H. Baltes, Offset in CMOS magnetotransistors - Part I: Analysis of causes, IEEE DEVICE, 48(9), 2001, pp. 1945-1953

Authors: Metz, M Baltes, H
Citation: M. Metz et H. Baltes, Offset in CMOS magnetotransistors - Part II: Reduction, IEEE DEVICE, 48(9), 2001, pp. 1954-1960

Authors: Takao, H Fukumoto, H Ishida, M
Citation: H. Takao et al., A CMOS integrated three-axis accelerometer fabricated with commercial submicrometer CMOS technology and bulk-micromachining, IEEE DEVICE, 48(9), 2001, pp. 1961-1968

Authors: Miura, N Abe, Y Sugihara, K Oishi, T Furukawa, T Nakahata, T Shiozawa, K Maruno, S
Citation: N. Miura et al., Junction capacitance reduction due to self-aligned pocket implantation in elevated source/drain NMOSFETs, IEEE DEVICE, 48(9), 2001, pp. 1969-1974

Authors: Chen, XD Liu, KC Ouyang, QC Jayanarayanan, SK Banerjee, SK
Citation: Xd. Chen et al., Hole and electron mobility enhancement in strained SiGe vertical MOSFETs, IEEE DEVICE, 48(9), 2001, pp. 1975-1980

Authors: Iniguez, B Raskin, JP Demeus, L Neve, A Vanhoenacker, D Simon, P Goffioul, M Flandre, D
Citation: B. Iniguez et al., Deep-submicrometer DC-to-RF SOI MOSFET macro-model, IEEE DEVICE, 48(9), 2001, pp. 1981-1988

Authors: Washio, K Kondo, M Ohue, E Oda, K Hayami, R Tanabe, M Shimamoto, H Harada, T
Citation: K. Washio et al., A 0.2-mu m self-aligned selective-epitaxial-growth SiGeHBT featuring 107-GHz f(max) and 6.7-ps ECL, IEEE DEVICE, 48(9), 2001, pp. 1989-1994

Authors: Takeuchi, K Koh, R Mogami, T
Citation: K. Takeuchi et al., A study of the threshold voltage variation for ultra-small bulk and SOICMOS, IEEE DEVICE, 48(9), 2001, pp. 1995-2001

Authors: Yoon, SM Ishiwara, H
Citation: Sm. Yoon et H. Ishiwara, Memory operations of 1T2C-type ferroelectric memory cell with excellent data retention characteristics, IEEE DEVICE, 48(9), 2001, pp. 2002-2008

Authors: Bradley, AT Jaeger, RC Suhling, JC O'Connor, KJ
Citation: At. Bradley et al., Piezoresistive characteristics of short-channel MOSFETs on (100) silicon, IEEE DEVICE, 48(9), 2001, pp. 2009-2015

Authors: Roy, PK Chen, YN Chetlur, S
Citation: Pk. Roy et al., Synthesis of a new manufacturable high-quality graded gate oxide for sub-0.2 mu m technologies, IEEE DEVICE, 48(9), 2001, pp. 2016-2021

Authors: Rajendran, K Schoenmaker, W Decoutere, S Loo, R Caymax, M Vandervorst, W
Citation: K. Rajendran et al., Measurement and simulation of boron diffusion in strained Si1-xGex epitaxial layers, IEEE DEVICE, 48(9), 2001, pp. 2022-2031
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