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Results: 26-50/3259
Authors:
Modelli, A
Manstretta, A
Torelli, G
Citation: A. Modelli et al., Basic feasibility constraints for multilevel CHE-programmed flash memories, IEEE DEVICE, 48(9), 2001, pp. 2032-2042
Authors:
Bourdelle, KK
Chen, YN
Ashton, RA
Rubin, LM
Agarwal, A
Morris, WH
Citation: Kk. Bourdelle et al., Evaluation of high dose, high energy boron implantation into Cz substratesfor epi-replacement in CMOS technology, IEEE DEVICE, 48(9), 2001, pp. 2043-2049
Authors:
Adan, AO
Higashi, K
Citation: Ao. Adan et K. Higashi, OFF-state leakage current mechanisms in BulkSi and SOI MOSFETs and their impact on CMOS ULSIs standby current, IEEE DEVICE, 48(9), 2001, pp. 2050-2057
Authors:
Han, SY
Chang, SI
Lee, J
Shin, HC
Citation: Sy. Han et al., 50 nm MOSFET with electrically induced source/drain (S/D) extensions, IEEE DEVICE, 48(9), 2001, pp. 2058-2064
Authors:
Maeda, S
Wada, Y
Yamamoto, K
Komurasaki, H
Matsumoto, T
Hirano, Y
Iwamatsu, T
Yamaguchi, Y
Ipposhi, T
Ueda, K
Mashiko, K
Maegawa, S
Inuishi, M
Citation: S. Maeda et al., Feasibility of 0.18 mu m SOI CMOS technology using hybrid trench isolationwith high resistivity substrate for embedded RF/analog applications, IEEE DEVICE, 48(9), 2001, pp. 2065-2073
Authors:
Ge, LX
Fossum, JG
Liu, B
Citation: Lx. Ge et al., Physical compact modeling and analysis of velocity overshoot in extremely scaled CMOS devices and circuits, IEEE DEVICE, 48(9), 2001, pp. 2074-2080
Authors:
Larcher, L
Pavan, P
Albani, L
Ghilardi, T
Citation: L. Larcher et al., Bias and W/L dependence of capacitive coupling coefficients in floating gate memory cells, IEEE DEVICE, 48(9), 2001, pp. 2081-2089
Authors:
Takato, H
Shimokawa, R
Citation: H. Takato et R. Shimokawa, Thin-film silicon solar cells using an adhesive bonding technique, IEEE DEVICE, 48(9), 2001, pp. 2090-2094
Authors:
Wang, Y
Neugroschel, A
Sah, CT
Citation: Y. Wang et al., Temperature dependence of surface recombination current in MOS transistors, IEEE DEVICE, 48(9), 2001, pp. 2095-2101
Authors:
Suzuki, K
Citation: K. Suzuki, Optimum base-doping profile for minimum-base transit time considering velocity saturation at base-collector junction and dependence of mobility and bandgap narrowing on doping concentration, IEEE DEVICE, 48(9), 2001, pp. 2102-2107
Authors:
Kondo, M
Shimamoto, H
Washio, K
Citation: M. Kondo et al., Variation in emitter diffusion depth by TiSi2 formation on polysilicon emitters of Si bipolar transistors, IEEE DEVICE, 48(9), 2001, pp. 2108-2117
Authors:
Luque, A
Marti, A
Cuadra, L
Citation: A. Luque et al., Thermodynamic consistency of sub-bandgap absorbing solar cell proposals, IEEE DEVICE, 48(9), 2001, pp. 2118-2124
Authors:
Lin, CH
Hsu, BC
Lee, MH
Liu, CW
Citation: Ch. Lin et al., A comprehensive study of inversion current in MOS tunneling diodes, IEEE DEVICE, 48(9), 2001, pp. 2125-2130
Authors:
Qiu, CF
Chen, HY
Wong, M
Kwok, HS
Citation: Cf. Qiu et al., Dependence of the current and power efficiencies of organic light-emittingdiode on the thickness of the constituent organic layers, IEEE DEVICE, 48(9), 2001, pp. 2131-2137
Authors:
Verma, MK
Pal, BB
Citation: Mk. Verma et Bb. Pal, Analysis of buried gate MESFET under dark and illumination, IEEE DEVICE, 48(9), 2001, pp. 2138-2142
Authors:
You, BD
Huang, AQ
Sin, JKO
Citation: Bd. You et al., A 600-V, 10-A trench bipolar junction diode with superior static and dynamic characteristics, IEEE DEVICE, 48(9), 2001, pp. 2143-2147
Authors:
Brezeanu, G
Badila, M
Tudor, B
Millan, J
Godignon, P
Udrea, F
Amaratunga, GAJ
Mihaila, A
Citation: G. Brezeanu et al., Accurate modeling and parameter extraction for 6H-SiC Schottky barrier diodes (SBDs) with nearly ideal breakdown voltage, IEEE DEVICE, 48(9), 2001, pp. 2148-2153
Authors:
Lee, YS
Lee, BH
Lee, WO
Han, MK
Choi, YI
Citation: Ys. Lee et al., Analysis of dual-gate LIGBT with gradual hole injection, IEEE DEVICE, 48(9), 2001, pp. 2154-2160
Authors:
Strollo, AGM
Napoli, E
Citation: Agm. Strollo et E. Napoli, Optimal ON-resistance versus breakdown voltage tradeoff in superjunction power devices: A novel analytical model, IEEE DEVICE, 48(9), 2001, pp. 2161-2167
Authors:
Xu, SM
Ren, CH
Lian, YC
Foo, PD
Sin, JKO
Citation: Sm. Xu et al., Theoretical analysis and experimental characterization of the dummy-gated VDMOSFET, IEEE DEVICE, 48(9), 2001, pp. 2168-2176
Authors:
Kumar, RA
Suresh, MS
Nagaraju, J
Citation: Ra. Kumar et al., Measurement of AC parameters of gallium arsenide (GaAs/Ge) solar cell by impedance spectroscopy, IEEE DEVICE, 48(9), 2001, pp. 2177-2179
Authors:
Litwin, A
Citation: A. Litwin, Overlooked interfacial silicide-polysilicon gate resistance in MOS transistors, IEEE DEVICE, 48(9), 2001, pp. 2179-2181
Authors:
Wu, JH
Scholvin, J
del Alamo, JA
Citation: Jh. Wu et al., An insulator-lined silicon substrate-via technology with high aspect ratio, IEEE DEVICE, 48(9), 2001, pp. 2181-2183
Authors:
Verret, D
Citation: D. Verret, Special section featuring selected papers from the 2000 European Solid-State Device Research Conference (ESSDERC), IEEE DEVICE, 48(8), 2001, pp. 1491-1491
Authors:
Wang, H
Ng, GI
Citation: H. Wang et Gi. Ng, Electrical properties and transport mechanisms of InP/InGaAs HBTs operatedat low temperature, IEEE DEVICE, 48(8), 2001, pp. 1492-1497