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Results: 1-8 |
Results: 8
Ultra-thin oxides grown on silicon (100) by rapid thermal oxidation for CMOS and advanced devices
Authors: Mur, P Semeria, MN Olivier, M Papon, AM Leroux, C Reimbold, G Gentile, P Magnea, N Baron, T Clerc, R Ghibaudo, G
Citation: P. Mur et al., Ultra-thin oxides grown on silicon (100) by rapid thermal oxidation for CMOS and advanced devices, APPL SURF S, 175, 2001, pp. 726-733
Impact of gate tunneling leakage on the operation of NMOS transistors withultra-thin gate oxides
Authors: Lime, F Clerc, R Ghibaudo, G Pananakakis, G Guegan, G
Citation: F. Lime et al., Impact of gate tunneling leakage on the operation of NMOS transistors withultra-thin gate oxides, MICROEL ENG, 59(1-4), 2001, pp. 119-125
Extraction of oxide thickness in the nanometer range using C(V) characteristics
Authors: Leroux, C Ghibaudo, G Reimbold, G Clerc, R Mathieu, S
Citation: C. Leroux et al., Extraction of oxide thickness in the nanometer range using C(V) characteristics, MICROEL ENG, 59(1-4), 2001, pp. 277-283
A physical compact model for direct tunneling from NMOS inversion layers
Authors: Clerc, R O'Sullivan, P McCarthy, KG Ghibaudo, G Pananakakis, G Mathewson, A
Citation: R. Clerc et al., A physical compact model for direct tunneling from NMOS inversion layers, SOL ST ELEC, 45(10), 2001, pp. 1705-1716
Direct tunnelling models for circuit simulation
Authors: O'Sullivan, P Clerc, R McCarthy, KG Mathewson, A Ghibaudo, G
Citation: P. O'Sullivan et al., Direct tunnelling models for circuit simulation, MICROEL REL, 41(7), 2001, pp. 951-957
Electrical characterization and quantum modeling of MOS capacitors with ultra-thin oxides (1.4-3 nm)
Authors: Clerc, R Spinelli, AS Ghibaudo, G Leroux, C Pananakakis, G
Citation: R. Clerc et al., Electrical characterization and quantum modeling of MOS capacitors with ultra-thin oxides (1.4-3 nm), MICROEL REL, 41(7), 2001, pp. 1027-1030
Gate dielectrics for ultimate CMOS technologies - Limitations and alternative solutions
Authors: Ghibaudo, G Clerc, R Vincent, E Bruyere, S Autran, JL
Citation: G. Ghibaudo et al., Gate dielectrics for ultimate CMOS technologies - Limitations and alternative solutions, CR AC S IV, 1(7), 2000, pp. 911-927
Capacitance-Voltage (C-V) characterization of 20 angstrom thick gate oxide: parameter extraction and modeling
Authors: Clerc, R Devoivre, T Ghibaudo, G Caillat, C Guegan, G Reimbold, G Pananakakis, G
Citation: R. Clerc et al., Capacitance-Voltage (C-V) characterization of 20 angstrom thick gate oxide: parameter extraction and modeling, MICROEL REL, 40(4-5), 2000, pp. 571-575
Risultati: 1-8 |