Authors: Pacha, C Auer, U Burwick, C Glosekotter, P Brennemann, A Prost, W Tegude, FJ Goser, KF

Citation: C. Pacha et al., Threshold logic circuit design of parallel adders using resonant tunnelingdevices, IEEE VLSI, 8(5), 2000, pp. 558-572

Authors: Pacha, C Kessler, O Glosekotter, P Goser, KF Prost, W Brennemann, A Auer, U Tegude, FJ

Citation: C. Pacha et al., Parallel adder design with reduced circuit complexity using resonant tunneling transistors and threshold logic, ANALOG IN C, 24(1), 2000, pp. 7-25

Authors: Prost, W Auer, U Tegude, FJ Pacha, C Goser, KF Janssen, G van der Roer, T

Citation: W. Prost et al., Manufacturability and robust design of nanoelectronic logic circuits basedon resonant tunnelling diodes, INT J CIRCU, 28(6), 2000, pp. 537-552

Authors: Rossmann, ML Buhlmeier, A Manteuffel, G Goser, KF

Citation: Ml. Rossmann et al., Dynamic Hebbian learning strategies for VLSI-systems, NEUROCOMPUT, 28, 1999, pp. 157-164

Authors: Jung, S Thewes, R Goser, KF Weber, W

Citation: S. Jung et al., A low-power and high-performance CMOS fingerprint sensing and encoding architecture, IEEE J SOLI, 34(7), 1999, pp. 978-984