AAAAAA

   
Results: 1-7 |
Results: 7
A 64-MBIT, 640-MBYTE S BIDIRECTIONAL-DATA STROBED, DOUBLE-DATA-RATE SDRAM WITH A 40-MW DLL FOR A 256-MEGABYTE MEMORY SYSTEM/
Authors: KIM CH LEE JH LEE JB KIM BS PARK CS LEE SB LEE SY PARK CW ROH JG NAM HS KIM DG LEE DY JUNG TS YOON H CHO SI
Citation: Ch. Kim et al., A 64-MBIT, 640-MBYTE S BIDIRECTIONAL-DATA STROBED, DOUBLE-DATA-RATE SDRAM WITH A 40-MW DLL FOR A 256-MEGABYTE MEMORY SYSTEM/, IEEE journal of solid-state circuits, 33(11), 1998, pp. 1703-1710
AN 8-BIT-RESOLUTION, 360-MU-S WRITE TIME NONVOLATILE ANALOG MEMORY-BASED ON DIFFERENTIALLY BALANCED CONSTANT-TUNNELING-CURRENT SCHEME (DBCS)
Authors: KIM KH LEE K JUNG TS SUH KD
Citation: Kh. Kim et al., AN 8-BIT-RESOLUTION, 360-MU-S WRITE TIME NONVOLATILE ANALOG MEMORY-BASED ON DIFFERENTIALLY BALANCED CONSTANT-TUNNELING-CURRENT SCHEME (DBCS), IEEE journal of solid-state circuits, 33(11), 1998, pp. 1758-1762
A 120-MM(2) 64-MB NAND FLASH MEMORY ACHIEVING 180-NS BYTE EFFECTIVE PROGRAM SPEED/
Authors: KIM JK SAKUI K LEE SS ITOH Y KWON SC KANAZAWA K LEE KJ NAKAMURA H KIM KY HIMENO T KIM JR KANDA K JUNG TS OSHIMA Y SUH KD HASHIMOTO K AHN ST MIYAMOTO J
Citation: Jk. Kim et al., A 120-MM(2) 64-MB NAND FLASH MEMORY ACHIEVING 180-NS BYTE EFFECTIVE PROGRAM SPEED/, IEEE journal of solid-state circuits, 32(5), 1997, pp. 670-680
A 3.3-V SINGLE POWER-SUPPLY 16-MB NONVOLATILE VIRTUAL DRAM USING A NAND FLASH MEMORY TECHNOLOGY
Authors: JUNG TS CHOI DC CHO SH KIM MJ LEE SK CHOI BS YUM JS KIM SH LEE DG SON JC YONG MS OH HK JUN SB LEE WM HAQ E SUH KD ALI SB LIM HK
Citation: Ts. Jung et al., A 3.3-V SINGLE POWER-SUPPLY 16-MB NONVOLATILE VIRTUAL DRAM USING A NAND FLASH MEMORY TECHNOLOGY, IEEE journal of solid-state circuits, 32(11), 1997, pp. 1748-1757
THE MULTIPLICITY OF SOLUTIONS AND GEOMETRY OF A NONLINEAR ELLIPTIC EQUATION
Authors: CHOI QH CHUN SK JUNG TS
Citation: Qh. Choi et al., THE MULTIPLICITY OF SOLUTIONS AND GEOMETRY OF A NONLINEAR ELLIPTIC EQUATION, Studia Mathematica, 120(3), 1996, pp. 259-270
A 117-MM(2) 3.3-V ONLY 128-MB MULTILEVEL NAND FLASH MEMORY FOR MASS-STORAGE APPLICATIONS
Authors: JUNG TS CHOI YJ SUH KD SUH BH KIM JK LIM YH KOH YN PARK JW LEE KJ PARK JH PARK KT KIM JR YI JH LIM HK
Citation: Ts. Jung et al., A 117-MM(2) 3.3-V ONLY 128-MB MULTILEVEL NAND FLASH MEMORY FOR MASS-STORAGE APPLICATIONS, IEEE journal of solid-state circuits, 31(11), 1996, pp. 1575-1583
A FULLY INTEGRATED, MONOLITHIC, CRYOGENIC CHARGE SENSITIVE PREAMPLIFIER USING N-CHANNEL JFETS AND POLYSILICON RESISTORS
Authors: JUNG TS GUCKEL H SEEFELDT J OTT G AHN YC
Citation: Ts. Jung et al., A FULLY INTEGRATED, MONOLITHIC, CRYOGENIC CHARGE SENSITIVE PREAMPLIFIER USING N-CHANNEL JFETS AND POLYSILICON RESISTORS, IEEE transactions on nuclear science, 41(4), 1994, pp. 1240-1245
Risultati: 1-7 |