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Results:
1-8
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Results: 8
Authors:
SERRANOGOTARREDONA T
LINARESBARRANCO B
Citation: T. Serranogotarredona et B. Linaresbarranco, A HIGH-PRECISION CURRENT-MODE WTA-MAX CIRCUIT WITH MULTICHIP CAPABILITY, IEEE journal of solid-state circuits, 33(2), 1998, pp. 280-286
Authors:
SERRANOGOTARREDONA T
LINARESBARRANCO B
Citation: T. Serranogotarredona et B. Linaresbarranco, 7-DECADE TUNING RANGE CMOS OTA-C SINUSOIDAL VCO, Electronics Letters, 34(17), 1998, pp. 1621-1622
Authors:
SERRANOGOTARREDONA T
LINARESBARRANCO B
Citation: T. Serranogotarredona et B. Linaresbarranco, AN ART1 MICROCHIP AND ITS USE IN MULTI-ART1 SYSTEMS, IEEE transactions on neural networks, 8(5), 1997, pp. 1184-1194
Authors:
SERRANOGOTARREDONA T
LINARESBARRANCO B
Citation: T. Serranogotarredona et B. Linaresbarranco, A REAL-TIME CLUSTERING MICROCHIP NEURAL ENGINE, IEEE transactions on very large scale integration (VLSI) systems, 4(2), 1996, pp. 195-209
Authors:
SERRANOGOTARREDONA T
LINARESBARRANCO B
Citation: T. Serranogotarredona et B. Linaresbarranco, A MODIFIED ART-1 ALGORITHM MORE SUITABLE FOR VLSI IMPLEMENTATIONS, Neural networks, 9(6), 1996, pp. 1025-1043
Authors:
SERRANO T
LINARESBARRANCO B
Citation: T. Serrano et B. Linaresbarranco, A MODULAR CURRENT-MODE HIGH-PRECISION WINNER-TAKE-ALL CIRCUIT, IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 42(2), 1995, pp. 132-134
Authors:
SERRANO T
LINARESBARRANCO B
Citation: T. Serrano et B. Linaresbarranco, THE ACTIVE-INPUT REGULATED-CASCODE CURRENT MIRROR, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 41(6), 1994, pp. 464-467
Authors:
LINARESBARRANCO B
SANCHEZSINENCIO E
RODRIGUEZVAZQUEZ A
HUERTAS JL
Citation: B. Linaresbarranco et al., A CMOS ANALOG ADAPTIVE BAM WITH ON-CHIP LEARNING AND WEIGHT REFRESHING, IEEE transactions on neural networks, 4(3), 1993, pp. 445-455
Risultati:
1-8
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