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Results: 1-14 |
Results: 14
Synchronous approach to the functional equivalence of embedded system implementations
Authors: Hsieh, H Balarin, F Lavagno, L Sangiovanni-Vincentelli, A
Citation: H. Hsieh et al., Synchronous approach to the functional equivalence of embedded system implementations, IEEE COMP A, 20(8), 2001, pp. 1016-1033
Tachykinin activation of human monocytes from patients with rheumatoid arthritis: in vitro and ex-vivo effects of cyclosporin A
Authors: Lavagno, L Bordin, G Colangelo, D Viano, I Brunelleschi, S
Citation: L. Lavagno et al., Tachykinin activation of human monocytes from patients with rheumatoid arthritis: in vitro and ex-vivo effects of cyclosporin A, NEUROPEPTID, 35(2), 2001, pp. 92-99
Macrophage Stimulating Protein (MSP) evokes superoxide anion production byhuman macrophages of different origin
Authors: Brunelleschi, S Penengo, L Lavagno, L Santoro, C Colangelo, D Viano, I Gaudino, G
Citation: S. Brunelleschi et al., Macrophage Stimulating Protein (MSP) evokes superoxide anion production byhuman macrophages of different origin, BR J PHARM, 134(6), 2001, pp. 1285-1295
ECL: A specification environment for system-level design
Authors: Berry, G Harcourt, E Lavagno, L Sentovich, E
Citation: G. Berry et al., ECL: A specification environment for system-level design, ELECTRONIC CHIPS & SYSTEMS DESIGN LANGUAGES, 2001, pp. 205-212
Formal models for embedded system design
Authors: Sgroi, M Lavagno, L Sangiovanni-Vincentelli, A
Citation: M. Sgroi et al., Formal models for embedded system design, IEEE DES T, 17(2), 2000, pp. 14-27
Tachykinin activation of human monocytes from patients with interstitial lung disease, healthy smokers or healthy volunteers
Authors: Brunelleschi, S Nicali, R Lavagno, L Viano, I Pozzi, E Gagliardi, L Ghio, P Albera, C
Citation: S. Brunelleschi et al., Tachykinin activation of human monocytes from patients with interstitial lung disease, healthy smokers or healthy volunteers, NEUROPEPTID, 34(1), 2000, pp. 45-50
Deriving Signal Transition Graphs from behavioral Verilog HDL
Authors: Blunno, I Lavagno, L
Citation: I. Blunno et L. Lavagno, Deriving Signal Transition Graphs from behavioral Verilog HDL, HARDWARE DESIGN AND PETRI NETS, 2000, pp. 151-170
Advances in encoding for logic synthesis
Authors: Lavagno, L Villa, T Sangiovanni-Vincentelli, AL
Citation: L. Lavagno et al., Advances in encoding for logic synthesis, VLSI DESIGN ENVIRONMENTS, 2000, pp. 186-216
Fast instruction cache simulation for hardware/software co-design
Authors: Lajolo, M Lavagno, L Sangiovanni-Vincentelli, A
Citation: M. Lajolo et al., Fast instruction cache simulation for hardware/software co-design, IEICE T FUN, E82A(11), 1999, pp. 2475-2484
Decomposition and technology mapping of speed-independent circuits using Boolean relations
Authors: Cortadella, J Kishinevsky, M Kondratyev, A Lavagno, L Pastor, E Yakovlev, A
Citation: J. Cortadella et al., Decomposition and technology mapping of speed-independent circuits using Boolean relations, IEEE COMP A, 18(9), 1999, pp. 1221-1236
Synthesis of software programs for embedded control applications
Authors: Balarin, F Chiodo, M Giusto, P Hsieh, H Jurecska, A Lavagno, L Sangiovanni-Vincentelli, A Sentovich, EM Suzuki, K
Citation: F. Balarin et al., Synthesis of software programs for embedded control applications, IEEE COMP A, 18(6), 1999, pp. 834-849
Logic decomposition of speed-independent circuits
Authors: Kondratyev, A Cortadella, J Kishinevsky, M Lavagno, L Yakovlev, A
Citation: A. Kondratyev et al., Logic decomposition of speed-independent circuits, P IEEE, 87(2), 1999, pp. 347-362
Rapid-prototyping of embedded systems via reprogrammable devices
Authors: Cardelli, S Chiodo, M Giusto, P Jurecska, A Lavagno, L Sansoe, C Sangiovanni-Vincentelli, A
Citation: S. Cardelli et al., Rapid-prototyping of embedded systems via reprogrammable devices, DES AUTOM E, 3(2-3), 1998, pp. 149-161
Partial-scan delay fault testing of asynchronous circuits
Authors: Kishinevsky, M Kondratyev, A Lavagno, L Saldanha, A Taubin, A
Citation: M. Kishinevsky et al., Partial-scan delay fault testing of asynchronous circuits, IEEE COMP A, 17(11), 1998, pp. 1184-1199
Risultati: 1-14 |