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Results:
1-6
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Results: 6
System-level test synthesis for mixed-signal designs
Authors:
Ozev, S Orailoglu, A
Citation:
S. Ozev et A. Orailoglu, System-level test synthesis for mixed-signal designs, IEEE CIR-II, 48(6), 2001, pp. 588-599
Concurrent test for digital linear systems
Authors:
Bayraktaroglu, I Orailoglu, A
Citation:
I. Bayraktaroglu et A. Orailoglu, Concurrent test for digital linear systems, IEEE COMP A, 20(9), 2001, pp. 1132-1142
Performance and power effectiveness in embedded processors - Customizable partitioned caches
Authors:
Petrov, P Orailoglu, A
Citation:
P. Petrov et A. Orailoglu, Performance and power effectiveness in embedded processors - Customizable partitioned caches, IEEE COMP A, 20(11), 2001, pp. 1309-1318
On-line test for fault-secure fault identification
Authors:
Hamilton, SN Orailoglu, A
Citation:
Sn. Hamilton et A. Orailoglu, On-line test for fault-secure fault identification, IEEE VLSI, 8(4), 2000, pp. 446-452
Redundancy and testability in digital filter datapaths
Authors:
Goodby, L Orailoglu, A
Citation:
L. Goodby et A. Orailoglu, Redundancy and testability in digital filter datapaths, IEEE COMP A, 18(5), 1999, pp. 631-644
RTL test justification and propagation analysis for modular designs
Authors:
Makris, Y Orailoglu, A
Citation:
Y. Makris et A. Orailoglu, RTL test justification and propagation analysis for modular designs, J ELEC TEST, 13(2), 1998, pp. 105-120
Risultati:
1-6
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