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Results: 1-25/29
Authors:
Wang, ZF
Suzuki, H
Parhi, KK
Citation: Zf. Wang et al., Finite wordlength analysis and adaptive decoding for Turbo/MAP decoders, J VLSI S P, 29(3), 2001, pp. 209-221
Authors:
Kuhlmann, M
Parhi, KK
Citation: M. Kuhlmann et Kk. Parhi, A novel low-power shared division and square-root architecture using the GST algorithm, VLSI DESIGN, 12(3), 2001, pp. 365-376
Authors:
Chi, ZP
Ma, J
Parhi, KK
Citation: Zp. Chi et al., Hybrid annihilation transformation (HAT) for pipelining QRD-based least-square adaptive filters, IEEE CIR-II, 48(7), 2001, pp. 661-674
Authors:
Parhi, KK
Citation: Kk. Parhi, Approaches to low-power implementations of DSP systems, IEEE CIRC-I, 48(10), 2001, pp. 1214-1224
Authors:
Ma, J
Parhi, KK
Deprettere, EF
Citation: J. Ma et al., A unified algebraic transformation approach for parallel recursive and adaptive filtering and SVD algorithms, IEEE SIGNAL, 49(2), 2001, pp. 424-437
Authors:
Zervakis, ME
Sundararajan, V
Parhi, KK
Citation: Me. Zervakis et al., Vector processing of wavelet coefficients for robust image denoising, IMAGE VIS C, 19(7), 2001, pp. 435-450
Authors:
Zhang, T
Parhi, KK
Citation: T. Zhang et Kk. Parhi, Systematic design of original and modified Mastrovito multipliers for general irreducible polynomials, IEEE COMPUT, 50(7), 2001, pp. 734-749
Authors:
Shalash, AF
Parhi, KK
Citation: Af. Shalash et Kk. Parhi, Power efficient folding of pipelined LMS adaptive filters with applications to wireline digital communications, J VLSI S P, 25(3), 2000, pp. 199-213
Authors:
Satyanarayana, JH
Parhi, KK
Citation: Jh. Satyanarayana et Kk. Parhi, Theoretical analysis of word-level switching activity in the presence of glitching and correlation, IEEE VLSI, 8(2), 2000, pp. 148-159
Authors:
Song, LL
Parhi, KK
Kuroda, I
Nishitani, T
Citation: Ll. Song et al., Hardware/software codesign of finite field datapath for low-energy Reed-Solomon codecs, IEEE VLSI, 8(2), 2000, pp. 160-172
Authors:
Chung, JG
Kim, H
Parhi, KK
Citation: Jg. Chung et al., Angle-constrained IIR filter pipelining for reduced coefficient sensitivities, IEEE CIR-II, 47(6), 2000, pp. 555-559
Authors:
Chang, YN
Parhi, KK
Citation: Yn. Chang et Kk. Parhi, High-performance digit-serial complex multiplier, IEEE CIR-II, 47(6), 2000, pp. 570-572
Authors:
Gao, LJ
Parhi, KK
Citation: Lj. Gao et Kk. Parhi, Hierarchical pipelining and folding of QRD-RLS adaptive filters and its application to digital beamforming, IEEE CIR-II, 47(12), 2000, pp. 1503-1519
Authors:
Ma, J
Parhi, KK
Deprettere, EF
Citation: J. Ma et al., Pipelined CORDIC-based cascade orthogonal IIR digital filters, IEEE CIR-II, 47(11), 2000, pp. 1238-1253
Authors:
Ma, J
Parhi, KK
Hekstra, GJ
Deprettere, EF
Citation: J. Ma et al., Efficient implementations of pipelined CORDIC based IIR digital filters using fast orthonormal mu-rotations, IEEE SIGNAL, 48(9), 2000, pp. 2712-2716
Authors:
Ma, J
Parhi, KK
Deprettere, EF
Citation: J. Ma et al., Annihilation-reordering look-ahead pipelined CORDIC-based RLS adaptive filters and their application to adaptive beamforming, IEEE SIGNAL, 48(8), 2000, pp. 2414-2431
Authors:
Satyanarayana, JH
Parhi, KK
Citation: Jh. Satyanarayana et Kk. Parhi, Power estimation of digital data paths using HEAT, IEEE DES T, 17(2), 2000, pp. 101-110
Authors:
Chang, YN
Suzuki, H
Parhi, KK
Citation: Yn. Chang et al., A 2-Mb/s 256-state 10-mW rate-1/3 Viterbi decoder, IEEE J SOLI, 35(6), 2000, pp. 826-834
Authors:
Srinivas, HR
Parhi, KK
Citation: Hr. Srinivas et Kk. Parhi, A radix 2 shared division square root algorithm and its VLSI architecture, J VLSI S P, 21(1), 1999, pp. 37-60
Authors:
Parhi, KK
Citation: Kk. Parhi, Low-energy CSMT carry generators and binary adders, IEEE VLSI, 7(4), 1999, pp. 450-462
Authors:
Denk, TC
Parhi, KK
Citation: Tc. Denk et Kk. Parhi, Two-dimensional retiming, IEEE VLSI, 7(2), 1999, pp. 198-211
Authors:
Shalash, AF
Parhi, KK
Citation: Af. Shalash et Kk. Parhi, Multidimensional carrierless AM/PM systems for digital subscriber loops, IEEE COMMUN, 47(11), 1999, pp. 1655-1667
Authors:
Parhi, KK
Citation: Kk. Parhi, Video compression, SIGNAL PR S, 1999, pp. 17-41
Authors:
Denk, TC
Parhi, KK
Citation: Tc. Denk et Kk. Parhi, Wavelet VLSI architectures, SIGNAL PR S, 1999, pp. 329-353
Authors:
Raghunath, KJ
Parhi, KK
Citation: Kj. Raghunath et Kk. Parhi, Pipelined RLS for VLSI: STAR-RLS filters, SIGNAL PR S, 1999, pp. 519-550