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Results:
1-7
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Results: 7
Authors:
WALTER GH
WEBER W
BREDERLOW R
JURK R
LINNENBANK CG
SCHLUNDER C
SCHMITTLANDSIEDEL D
THEWES R
Citation: Gh. Walter et al., PRECISE QUANTITATIVE-EVALUATION OF THE HOT-CARRIER-INDUCED DRAIN SERIES RESISTANCE DEGRADATION IN LATID-N-MOSFETS, Microelectronics and reliability, 38(6-8), 1998, pp. 1063-1068
Authors:
EISELE M
BERTHOLD J
SCHMITTLANDSIEDEL D
MAHNKOPF R
Citation: M. Eisele et al., THE IMPACT OF INTRA-DIE DEVICE PARAMETER VARIATIONS ON PATH DELAYS AND ON THE DESIGN FOR YIELD OF LOW-VOLTAGE DIGITAL CIRCUITS, IEEE transactions on very large scale integration (VLSI) systems, 5(4), 1997, pp. 360-368
Authors:
GRIEP S
KEITELSCHULZ D
SCHMITTLANDSIEDEL D
Citation: S. Griep et al., DESIGN BASED FAILURE ANALYSIS AND YIELD IMPROVEMENT IN CMOS-CIRCUITS, Quality and reliability engineering international, 12(4), 1996, pp. 221-227
Authors:
HERBST H
SCHMITTLANDSIEDEL D
SCHOBINGER M
Citation: H. Herbst et al., FROM ROADMAPS TO REALITY - THE CHALLENGES OF DESIGNING TOMORROWS CHIPS, Siemens Review, 1996, pp. 15-18
Authors:
THEWES R
SCHINDHELM T
TIEBOUT M
WOHLRAB E
KOLLMER U
KESSEL S
SCHMITTLANDSIEDEL D
WEBER W
Citation: R. Thewes et al., METHOD FOR PRECISE DETERMINATION OF THE STATISTICAL DISTRIBUTION OF THE INPUT OFFSET VOLTAGE OF DIFFERENTIAL STAGES, Microelectronics and reliability, 36(11-12), 1996, pp. 1823-1826
Authors:
KHARE JB
MARY W
GRIEP S
SCHMITTLANDSIEDEL D
Citation: Jb. Khare et al., YIELD-ORIENTED COMPUTER-AIDED DEFECT DIAGNOSIS, IEEE transactions on semiconductor manufacturing, 8(2), 1995, pp. 195-206
Authors:
SCHMITTLANDSIEDEL D
KEITELSCHULZ D
KHARE J
GRIEP S
MALY W
Citation: D. Schmittlandsiedel et al., CRITICAL AREA ANALYSIS FOR DESIGN-BASED YIELD IMPROVEMENT OF VLSI CIRCUITS, Quality and reliability engineering international, 11(4), 1995, pp. 227-232
Risultati:
1-7
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